AT32UC3L064-D3HES ATMEL [ATMEL Corporation], AT32UC3L064-D3HES Datasheet - Page 442

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AT32UC3L064-D3HES

Manufacturer Part Number
AT32UC3L064-D3HES
Description
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Figure 21-8. Peripheral Deselection
21.7.3.9
32099D–06/2010
NPCS[0..3]
NPCS[0..3]
NPCS[0..3]
NPCS[0..3]
Write TDR
Write TDR
Write TDR
Write TDR
TDRE
TDRE
TDRE
TDRE
Mode fault detection
PCS = A
A
A
A
A
CSAAT = 0 and CSNAAT = 0
CSAAT = 0 and CSNAAT = 0
DLYBCT
DLYBCT
DLYBCT
DLYBCT
Figure 21-8 on page 442
CSRn.CSAAT and CSRn.CSNAAT bits.
A mode fault is detected when the SPI is configured in master mode and a low level is driven by
an external master on the NPCS0/NSS signal. NPCS0, MOSI, MISO and SPCK must be config-
ured in open drain through the I/O Controller, so that external pull up resistors are needed to
guarantee high level.
DLYBCS
DLYBCS
DLYBCS
PCS = B
PCS=A
A
PCS = A
A
B
shows different peripheral deselection cases and the effect of the
A
PCS = A
A
A
A
A
CSAAT = 0 and CSNAAT = 1
CSAAT = 1 and CSNAAT= 0 / 1
DLYBCT
DLYBCT
DLYBCT
DLYBCT
AT32UC3L016/32/64
DLYBCS
DLYBCS
PCS = B
PCS = A
DLYBCS
A
A
PCS = A
DLYBCS
A
A
A
B
442

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