AT32UC3L064-D3HES ATMEL [ATMEL Corporation], AT32UC3L064-D3HES Datasheet - Page 193

• Manufacturer Part Number: AT32UC3L064-D3HES
• Manufacturer: ATMEL [ATMEL Corporation]

14.5.3.1
32099D–06/2010
Open Loop Operation
The DFLL provides a high frequency clock. The DFLL can operate in both open loop mode and
closed loop mode. In closed loop mode a low frequency clock with high accuracy can be used as
reference clock to get high accuracy on the output frequency.
The output frequency is adjusted by changing the values in the COARSE and FINE fields in the
DFLL0 Configuration Register (DFLL0CONF.COARSE and DFLL0CONF.FINE). In open loop
mode, the user must find the values of COARSE and FINE to get the correct output frequency.
the Frequency Meter can be used to measure the output frequency until the desired output fre-
quency is reached. In closed loop mode, the COARSE and FINE values are controlled by the
DFLL Interface to meet a user specified frequency. Open loop operation and closed loop opera-
tion are described below.
To prevent unexpected writes due to software bugs, write access to the configuration registers
are protected by a locking mechanism, for details please refer to the UNLOCK register
description.
Figure 14-2. DFLLIF Block Diagram
When operating in open loop mode the output frequency of the DFLL depends on the values
written to the COARSE and the FINE fields in the DFLL0CONF register. Take care when setting
the value of the COARSE and the FINE fields, to make sure the output frequency does not
exceed the maximum frequency of the device after the division in the clock generator. The open
loop operation is selected by writing a one to the EN bit in the DFLL0CONF register, and then
writing a zero to the MODE bit in the DFLL0CONF register. It is possible to change the value of
• Can operate standalone as high frequency programmable oscillator in open loop mode
• Can operate as accurate frequency multiplier against a known frequency in closed loop mode
• Optional spread-spectrum clock generation
• Very high frequency multiplication supported - can generate all frequencies from 32kHz
8+9
32
CSTEP
FSTEP
FMUL
IMUL
DFLLLOCKLOSTC
DFLLLOCKC
FREQUENCY
DFLLLOCKLOSTF
TUNER
DFLLLOCKF
COARSE
FINE
DFLLUNDERFLOW
DFLLOVERFLOW
8
9
DAC
AT32UC3L016/32/64
CLK_DFLLIF_REF
VCO
193