OR3T125 Agere Systems, OR3T125 Datasheet - Page 129

• Manufacturer Part Number: OR3T125
• Description: 3C and 3T Field-Programmable Gate Arrays
• Manufacturer: Agere Systems

Data Sheet
June 1999
Lucent Technologies Inc.
Timing Characteristics
Table 57 . OR3C/Txxx Input to ExpressCLK (ECLK) Fast-Capture Setup/Hold Time (Pin-to-Pin) (continued)
OR3Cxx Commercial: V
OR3Txxx Commercial: V
Notes:
The pin-to-pin timing parameters in this table should be used instead of results reported by ORCA Foundry.
The ECLK delays are to all of the PIOs on one side of the device for middle pin input, or two sides of the device for corner pin input. The delay
includes both the input buffer delay and the clock routing to the PIO clock input.
Input to ECLK Hold Time (corner
Input to ECLK Hold Time (corner
ECLK pin)
ECLK pin, delayed data input)
(T
J
= 85 °C, V
Description
DD
= min)
DD
DD
= 5.0 V ± 5%, 0 °C
= 3.0 V to 3.6 V, 0 °C
Figure 79. Input to ExpressCLK Setup/Hold Time
(continued)
OR3C/T55
OR3C/T80
OR3C/T55
OR3C/T80
OR3T125
OR3T125
OR3T20
OR3T30
OR3T20
OR3T30
Device
INPUT
CLK
<
T
<
A
<
T
0.00
0.00
0.00
0.00
Min
A
—
—
—
—
—
—
70 °C; Industrial: V
<
70 °C; Industrial: V
-4
CLKCNTRL
Max
—
—
—
—
—
—
—
—
—
—
ECLK
PIO ECLK LATCH
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
Min
DD
D
-5
= 5.0 V ± 10%, –40 °C
DD
Max
Q
—
—
—
—
—
—
—
—
—
—
= 3.0 V to 3.6 V, –40 °C
Speed
ORCA Series 3C and 3T FPGAs
0.00
0.00
0.80
0.00
0.00
0.00
0.00
0.00
0.00
0.00
Min
-6
Max
—
—
—
—
—
—
—
—
—
—
<
T
A
<
0.00
0.00
1.10
0.00
0.00
0.00
0.00
0.00
0.00
0.00
Min
<
T
+85 °C.
A
<
-7
+85 °C.
Max
—
—
—
—
—
—
—
—
—
—
5-4847(F).b
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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