S912XEP100J5MAGR Freescale Semiconductor, S912XEP100J5MAGR Datasheet - Page 1243

• Manufacturer Part Number: S912XEP100J5MAGR
• Description: S912XEP Series 16 Bit 50 Mhz 1 MB Flash 64 KB Ram Microcontroller - LQFP-144
• Manufacturer: Freescale Semiconductor

1
A.7.2.1
In
Freescale Semiconductor
Drive mode
Load capacitance C
Thresholds for delay measurement points
Timing specified for equal load on all SPI output pins. Avoid asymmetric load.
Figure A-7
(CPOL = 1)
(CPOL = 0)
(Output)
(Output)
(Output)
(Output)
1. If configured as an output.
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, bit 2... MSB.
(Input)
MISO
MOSI
SCK
SCK
SS1
Master Mode
the timing diagram for master mode with transmission format CPHA = 0 is depicted.
LOAD
1
,
on all outputs
2
5
10
MSB IN2
MSB OUT2
Description
MC9S12XE-Family Reference Manual Rev. 1.23
6
Figure A-7. SPI Master Timing (CPHA = 0)
4
Table A-27. Measurement Conditions
1
Bit MSB-1. . . 1
4
Bit MSB-1. . . 1
9
12
12
LSB IN
LSB OUT
13
13
(20% / 80%) V
Full drive mode
Appendix A Electrical Characteristics
Value
50
11
3
DDX
Unit
pF
—
V
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