S912XEP100J5MAGR Freescale Semiconductor, S912XEP100J5MAGR Datasheet - Page 660
S912XEP100J5MAGR
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S912XEP100J5MAGR
Description
S912XEP Series 16 Bit 50 Mhz 1 MB Flash 64 KB Ram Microcontroller - LQFP-144
Manufacturer
Freescale Semiconductor
Datasheet
1.S912XEP100J5MAG.pdf
(1328 pages)
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Chapter 16 Freescale’s Scalable Controller Area Network (S12MSCANV3)
16.5
16.5.1
The procedure to initially start up the MSCAN module out of reset is as follows:
If the configuration of registers which are only writable in initialization mode shall be changed:
16.5.2
The bus-off recovery is user configurable. The bus-off state can either be left automatically or on user
request.
For reasons of backwards compatibility, the MSCAN defaults to automatic recovery after reset. In this
case, the MSCAN will become error active again after counting 128 occurrences of 11 consecutive
recessive bits on the CAN bus (see the Bosch CAN 2.0 A/B specification for details).
If the MSCAN is configured for user request (BORM set in MSCAN Control Register 1 (CANCTL1)), the
recovery from bus-off starts after both independent events have become true:
These two events may occur in any order.
660
1. Assert CANE
2. Write to the configuration registers in initialization mode
3. Clear INITRQ to leave initialization mode
1. Bring the module into sleep mode by setting SLPRQ and awaiting SLPAK to assert after the CAN
2. Enter initialization mode: assert INITRQ and await INITAK
3. Write to the configuration registers in initialization mode
4. Clear INITRQ to leave initialization mode and continue
•
•
bus becomes idle.
128 occurrences of 11 consecutive recessive bits on the CAN bus have been monitored
BOHOLD in MSCAN Miscellaneous Register (CANMISC) has been cleared by the user
Initialization/Application Information
MSCAN initialization
Bus-Off Recovery
MC9S12XE-Family Reference Manual , Rev. 1.23
Freescale Semiconductor
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