S912XEP100J5MAGR Freescale Semiconductor, S912XEP100J5MAGR Datasheet - Page 95

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S912XEP100J5MAGR

Manufacturer Part Number
S912XEP100J5MAGR
Description
S912XEP Series 16 Bit 50 Mhz 1 MB Flash 64 KB Ram Microcontroller - LQFP-144
Manufacturer
Freescale Semiconductor
Datasheet

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Part Number:
S912XEP100J5MAGR
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Table 2-2
to the SOC Guide for the availability of the individual pins in the different package options.
Freescale Semiconductor
Port
A
B
C
D
-
Pin Name
PC[7:0]
PD[7:0]
PB[7:1]
PA[7:0]
BKGD
PB[0]
shows all the pins and their functions that are controlled by the Port Integration Module. Refer
If there is more than one function associated with a pin, the priority is
indicated by the position in the table from top (highest priority) to bottom
(lowest priority).
Pin Function
IVD[15:8]
& Priority
ADDR[15:8]
DATA[15:8]
ADDR[7:1]
MODC
IVD[7:1]
DATA[7:0]
ADDR[0]
BKGD
IVD0
GPIO
GPIO
GPIO
GPIO
GPIO
UDS
mux
mux
mux
3
(2)
3
(1)
(3)
MC9S12XE-Family Reference Manual , Rev. 1.23
Table 2-2. Pin Functions and Priorities
I/O
I/O S12X_BDM communication pin
I/O General-purpose I/O
I/O General-purpose I/O
I/O General-purpose I/O
I/O High-order bidirectional data input/output
I/O General-purpose I/O
I/O Low-order bidirectional data input/output
I/O General-purpose I/O
O High-order external bus address output
O Low-order external bus address output
O Low-order external bus address output
O Upper data strobe
I
MODC input during RESET
(multiplexed with IVIS data)
(multiplexed with IVIS data)
(multiplexed with IVIS data)
Configurable for reduced input threshold
Configurable for reduced input threshold
NOTE
Description
Chapter 2 Port Integration Module (S12XEPIMV1)
Pin Function
dependent
dependent
dependent
dependent
after Reset
BKGD
Mode
Mode
Mode
Mode
(4)
4
4
4
95

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