S912XEP100J5MAGR Freescale Semiconductor, S912XEP100J5MAGR Datasheet - Page 745

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S912XEP100J5MAGR

Manufacturer Part Number
S912XEP100J5MAGR
Description
S912XEP Series 16 Bit 50 Mhz 1 MB Flash 64 KB Ram Microcontroller - LQFP-144
Manufacturer
Freescale Semiconductor
Datasheet

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20.4.5
20.4.5.1
The SCI transmitter can accommodate either 8-bit or 9-bit data characters. The state of the M bit in SCI
control register 1 (SCICR1) determines the length of data characters. When transmitting 9-bit data, bit T8
in SCI data register high (SCIDRH) is the ninth bit (bit 8).
20.4.5.2
To transmit data, the MCU writes the data bits to the SCI data registers (SCIDRH/SCIDRL), which in turn
are transferred to the transmitter shift register. The transmit shift register then shifts a frame out through
the TXD pin, after it has prefaced them with a start bit and appended them with a stop bit. The SCI data
registers (SCIDRH and SCIDRL) are the write-only buffers between the internal data bus and the transmit
shift register.
Freescale Semiconductor
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
TDRE IRQ
BER IRQ
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
TC IRQ
Clock
Bus
SBR12:SBR0
Transmitter
Transmitter Character Length
Character Transmission
Baud Divider
PE
PT
M
Generation
Parity
÷ 16
T8
MC9S12XE-Family Reference Manual Rev. 1.23
Figure 20-16. Transmitter Block Diagram
BERRIF
TDRE
TCIE
TCIE
TIE
TC
H
8
7
11-Bit Transmit Register
6
5
SCI Data Registers
Internal Bus
4
Transmitter Control
TE
3
2
Chapter 20 Serial Communication Interface (S12SCIV5)
Collision Detect
SBK
1
Transmit
0
BERRM[1:0]
L
CONTROL
TXPOL
LOOP
SCTXD
SCRXD
(From Receiver)
LOOPS
RSRC
To Receiver
SCTXD
745

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