S912XEP100J5MAGR Freescale Semiconductor, S912XEP100J5MAGR Datasheet - Page 878
S912XEP100J5MAGR
Manufacturer Part Number
S912XEP100J5MAGR
Description
S912XEP Series 16 Bit 50 Mhz 1 MB Flash 64 KB Ram Microcontroller - LQFP-144
Manufacturer
Freescale Semiconductor
Datasheet
1.S912XEP100J5MAG.pdf
(1328 pages)
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Chapter 24 128 KByte Flash Module (S12XFTM128K2V1)
Upon clearing CCIF to launch the Verify Backdoor Access Key command, the Memory Controller will
check the FSEC KEYEN bits to verify that this command is enabled. If not enabled, the Memory
Controller sets the ACCERR bit in the FSTAT register and terminates. If the command is enabled, the
Memory Controller compares the key provided in FCCOB to the backdoor comparison key in the Flash
configuration field with Key 0 compared to 0x7F_FF00, etc. If the backdoor keys match, security will be
released. If the backdoor keys do not match, security is not released and all future attempts to execute the
Verify Backdoor Access Key command are aborted (set ACCERR) until a reset occurs. The CCIF flag is
set after the Verify Backdoor Access Key operation has completed.
24.4.2.12 Set User Margin Level Command
The Set User Margin Level command causes the Memory Controller to set the margin level for future read
operations of a specific P-Flash or D-Flash block.
Upon clearing CCIF to launch the Set User Margin Level command, the Memory Controller will set the
user margin level for the targeted block and then set the CCIF flag.
878
FERSTAT
Register
FSTAT
Table 24-53. Verify Backdoor Access Key Command FCCOB Requirements
CCOBIX[2:0]
Table 24-55. Set User Margin Level Command FCCOB Requirements
Table 24-54. Verify Backdoor Access Key Command Error Handling
000
001
CCOBIX[2:0]
MGSTAT1
MGSTAT0
EPVIOLIF
ACCERR
Error Bit
FPVIOL
011
100
MC9S12XE-Family Reference Manual , Rev. 1.23
Set if CCOBIX[2:0] != 100 at command launch
Set if an incorrect backdoor key is supplied
Set if backdoor key access has not been enabled (KEYEN[1:0] != 10, see
Section
Set if the backdoor key has mismatched since the last reset
None
None
None
None
0x0D
24.3.2.2)
FCCOB Parameters
FCCOB Parameters
Margin level setting
Key 2
Key 3
Global address [22:16] to identify the
Error Condition
Flash block
Freescale Semiconductor
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