S912XEP100J5MAGR Freescale Semiconductor, S912XEP100J5MAGR Datasheet - Page 178

• Manufacturer Part Number: S912XEP100J5MAGR
• Description: S912XEP Series 16 Bit 50 Mhz 1 MB Flash 64 KB Ram Microcontroller - LQFP-144
• Manufacturer: Freescale Semiconductor

Chapter 2 Port Integration Module (S12XEPIMV1)
178
Field
PTF
PTF
PTF
PTF
PTF
PTF
PTF
PTF
7
6
5
4
3
2
1
0
Port F general purpose input/output data—Data Register
Port F pin 7 is associated with the TXD signal of the SCI3 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port F general purpose input/output data—Data Register
Port F pin 6 is associated with the RXD signal of the SCI3 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port F general purpose input/output data—Data Register
Port F pin 5 is associated with the TXD signal of the SCI6 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port F general purpose input/output data—Data Register
Port F pin 4 is associated with the RXD signal of the SCI6 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port F general purpose input/output data—Data Register
Port F pin 3 is associated with the TXD signal of the SC5 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port F general purpose input/output data—Data Register
Port F pin 2 is associated with the RXD signal of the SCI5 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port F general purpose input/output data—Data Register
Port F pin 3 is associated with the TXD signal of the SCI4 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port F general purpose input/output data—Data Register
Port F pin 2 is associated with the RXD signal of the SCI4 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Table 2-96. PTF Register Field Descriptions
MC9S12XE-Family Reference Manual , Rev. 1.23
Description
Freescale Semiconductor