S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 371

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S912XEQ384J3MALR

Manufacturer Part Number
S912XEQ384J3MALR
Description
S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112
Manufacturer
Freescale Semiconductor
Datasheet
10.3.1.14 XGATE Register 2 (XGR2)
The XGR2 register
Module Base +0x00024
Read: In debug mode if unsecured and not idle (XGCHID ≠ 0x00)
Write: In debug mode if unsecured and not idle (XGCHID ≠ 0x00)
10.3.1.15 XGATE Register 3 (XGR3)
The XGR3 register
Module Base +0x00026
Read: In debug mode if unsecured and not idle (XGCHID ≠ 0x00)
Write: In debug mode if unsecured and not idle (XGCHID ≠ 0x00)
Freescale Semiconductor
Reset
Reset
XGR2[15:0]
XGR3[15:0]
W
W
R
R
Field
15–0
Field
15–0
15
15
0
0
XGATE Register 2 — The RISC core’s register 2
XGATE Register 3 — The RISC core’s register 3
14
14
0
0
(Figure
(Figure
13
13
0
0
12
12
0
0
10-16) provides access to the RISC core’s register 2.
10-17) provides access to the RISC core’s register 3.
MC9S12XE-Family Reference Manual Rev. 1.24
11
11
Figure 10-16. XGATE Register 2 (XGR2)
Figure 10-17. XGATE Register 3 (XGR3)
0
0
Table 10-16. XGR2 Field Descriptions
Table 10-17. XGR3 Field Descriptions
10
10
0
0
0
0
9
9
0
0
8
8
XGR2
XGR3
Description
Description
0
0
7
7
6
0
6
0
0
0
5
5
0
0
4
4
Chapter 10 XGATE (S12XGATEV3)
0
0
3
3
0
0
2
2
1
0
1
0
0
0
0
0
371

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