S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 377

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S912XEQ384J3MALR

Manufacturer Part Number
S912XEQ384J3MALR
Description
S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112
Manufacturer
Freescale Semiconductor
Datasheet
Figure 10-25
Two concurrent threads are running on the system. One is running on the S12X_CPU and the other is
running on the RISC core. They both have a critical section of code that accesses the same system resource.
To guarantee that the system resource is only accessed by one thread at a time, the critical code sequence
must be embedded in a semaphore lock/release sequence as shown.
Freescale Semiconductor
set_xgsem: 1 is written to XGSEM[n] (and 1 is written to XGSEMM[n])
clr_xgsem: 0 is written to XGSEM[n] (and 1 is written to XGSEMM[n])
ssem:
csem:
gives an example of the typical usage of the XGATE hardware semaphores.
LOCKED BY
clr_xgsem
Executing SSEM instruction (on semaphore n)
Executing CSEM instruction (on semaphore n)
S12X_CPU
ssem &
set_xgsem
Figure 10-24. Semaphore State Transitions
MC9S12XE-Family Reference Manual Rev. 1.24
clr_xgsem
ssem & set_xgsem
UNLOCKED
csem
ssem
LOCKED BY
XGATE
csem
Chapter 10 XGATE (S12XGATEV3)
377

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