S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 748

Manufacturer Part Number

S912XEQ384J3MALR

S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112

Manufacturer

Freescale Semiconductor

Chapter 20 Serial Communication Interface (S12SCIV5)

The SCI receiver can accommodate either 8-bit or 9-bit data characters. The state of the M bit in SCI

control register 1 (SCICR1) determines the length of data characters. When receiving 9-bit data, bit R8 in

SCI data register high (SCIDRH) is the ninth bit (bit 8).

During an SCI reception, the receive shift register shifts a frame in from the RXD pin. The SCI data register

is the read-only buffer between the internal data bus and the receive shift register.

After a complete frame shifts into the receive shift register, the data portion of the frame transfers to the

SCI data register. The receive data register full ﬂag, RDRF, in SCI status register 1 (SCISR1) becomes set,

From TXD Pin

or Transmitter

Receiver Character Length

Character Reception

Baud Divider

MC9S12XE-Family Reference Manual Rev. 1.24

Figure 20-20. SCI Receiver Block Diagram

Detect Logic

Detect Logic

Internal Bus

11-Bit Receive Shift Register

SCI Data Register

Freescale Semiconductor

RX Active Edge IRQ