S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 473

• Manufacturer Part Number: S912XEQ384J3MALR
• Description: S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112
• Manufacturer: Freescale Semiconductor

11.3.2
This section describes in address order all the S12XECRG registers and their individual bits.
11.3.2.1
The SYNR register controls the multiplication factor of the IPLL and selects the VCO frequency range.
Read: Anytime
Write: Anytime except if PLLSEL = 1
The VCOFRQ[1:0] bit are used to configure the VCO gain for optimal stability and lock time. For correct
IPLL operation the VCOFRQ[1:0] bits have to be selected according to the actual target VCOCLK
frequency as shown in
IPLL (no locking and/or insufficient stability).
Freescale Semiconductor
Module Base + 0x0000
Reset
W
R
f VCO
f PLL
f BUS
Register Descriptions
=
=
S12XECRG Synthesizer Register (SYNR)
=
0
7
VCOFRQ[1:0]
Write to this register initializes the lock detector bit.
f
Clock) must not exceed the specified maximum. If POSTDIV = $00 then
f
----------------------------------- -
2 POSTDIV
f PLL
------------ -
VCO
PLL
2 f OSC
×
2
×
f VCO
is same as f
must be within the specified VCO frequency lock range. F.
Table
×
0
6
Figure 11-3. S12XECRG Synthesizer Register (SYNR)
(
------------------------------------ -
(
SYNDIV
REFDIV
11-2. Setting the VCOFRQ[1:0] bits wrong can result in a non functional
Table 11-2. VCO Clock Frequency Selection
MC9S12XE-Family Reference Manual Rev. 1.24
VCO
VCOCLK Frequency Ranges
80MHz < f
32MHz <= f
48MHz < f
+
+
(divide by one).
1
1
0
5
)
)
Reserved
VCO
VCO
VCO
<= 80MHz
<= 120MHz
<= 48MHz
NOTE
NOTE
0
4
Chapter 11 S12XE Clocks and Reset Generator (S12XECRGV1)
0
3
VCOFRQ[1:0]
SYNDIV[5:0]
00
01
10
11
0
2
BUS
(Bus
0
1
0
0
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