S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 525
S912XEQ384J3MALR
Manufacturer Part Number
S912XEQ384J3MALR
Description
S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112
Manufacturer
Freescale Semiconductor
Datasheet
1.S912XEQ384J3MAL.pdf
(1324 pages)
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13.4.2.2
The input channel pins can be multiplexed between analog and digital data. As analog inputs, they are
multiplexed and sampled as analog channels to the A/D converter. The analog/digital multiplex operation
is performed in the input pads. The input pad is always connected to the analog input channels of the
ADC12B16C. The input pad signal is buffered to the digital port registers. This buffer can be turned on or
off with the ATDDIEN register. This is important so that the buffer does not draw excess current when
analog potentials are presented at its input.
13.5
At reset the ADC12B16C is in a power down state. The reset state of each individual bit is listed within
the Register Description section (see
and their bit-field.
13.6
The interrupts requested by the ADC12B16C are listed in
related vector address and priority.
See
Freescale Semiconductor
Section 13.3.2, “Register Descriptions”
Resets
Interrupts
General-Purpose Digital Port Operation
Sequence Complete Interrupt
Compare Interrupt
Interrupt Source
MC9S12XE-Family Reference Manual Rev. 1.24
Table 13-24. ATD Interrupt Vectors
Section 13.3.2, “Register
for further details.
Mask
CCR
I bit
I bit
Table
Chapter 13 Analog-to-Digital Converter (ADC12B16CV1)
ACMPIE in ATDCTL2
Descriptions”) which details the registers
ASCIE in ATDCTL2
13-24. Refer to MCU specification for
Local Enable
525
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