MCP1631RD-DCPC1 Microchip Technology, MCP1631RD-DCPC1 Datasheet - Page 85

REF DES BATT CHARG OR LED DRIVER

MCP1631RD-DCPC1

Manufacturer Part Number
MCP1631RD-DCPC1
Description
REF DES BATT CHARG OR LED DRIVER
Manufacturer
Microchip Technology

Specifications of MCP1631RD-DCPC1

Current - Output / Channel
700mA
Outputs And Type
1, Non-Isolated
Features
Firmware for Li-Ion, NiMH, and NiCd Battery Charger
Voltage - Input
3.5 ~ 16 V
Utilized Ic / Part
MCP1631HV, PIC16F616
Core Chip
MCP1631HV, PIC16F616
Topology
Parallel, Series
Output Current
1A
No. Of Outputs
1
Input Voltage
3.5V To 16V
Dimming Control Type
Analog
Kit Contents
Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Output
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
10.0
The Enhanced Capture/Compare/PWM module is a
peripheral which allows the user to time and control
different events. In Capture mode, the peripheral
allows the timing of the duration of an event. The
Compare mode allows the user to trigger an external
REGISTER 10-1:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-4
bit 3-0
R/W-0
P1M1
ENHANCED CAPTURE/
COMPARE/PWM (WITH AUTO-
SHUTDOWN AND DEAD BAND)
MODULE
(PIC16F616/16HV616 ONLY)
P1M<1:0>: PWM Output Configuration bits
If CCP1M<3:2> = 00, 01, 10:
xx = P1A assigned as Capture/Compare input; P1B, P1C, P1D assigned as port pins
If CCP1M<3:2> = 11:
00 = Single output; P1A modulated; P1B, P1C, P1D assigned as port pins
01 = Full-Bridge output forward; P1D modulated; P1A active; P1B, P1C inactive
10 = Half-Bridge output; P1A, P1B modulated with dead-time control; P1C, P1D assigned as port pins
11 = Full-Bridge output reverse; P1B modulated; P1C active; P1A, P1D inactive
DC1B<1:0>: PWM Duty Cycle Least Significant bits
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR1L.
CCP1M<3:0>: ECCP Mode Select bits
0000 = Capture/Compare/PWM off (resets ECCP module)
0001 = Unused (reserved)
0010 = Compare mode, toggle output on match (CCP1IF bit is set)
0011 = Unused (reserved)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (CCP1IF bit is set)
1001 = Compare mode, clear output on match (CCP1IF bit is set)
1010 = Compare mode, generate software interrupt on match (CCP1IF bit is set, CCP1 pin is unaffected)
1011 = Compare mode, trigger special event (CCP1IF bit is set; CCP1 resets TMR1 and starts an A/D
1100 = PWM mode; P1A, P1C active-high; P1B, P1D active-high
1101 = PWM mode; P1A, P1C active-high; P1B, P1D active-low
1110 = PWM mode; P1A, P1C active-low; P1B, P1D active-high
1111 = PWM mode; P1A, P1C active-low; P1B, P1D active-low
R/W-0
P1M0
CCP1CON: ENHANCED CCP1 CONTROL REGISTER
conversion, if the ADC module is enabled)
W = Writable bit
‘1’ = Bit is set
DC1B1
R/W-0
PIC16F610/616/16HV610/616
DC1B0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CCP1M3
event when a predetermined amount of time has
expired. The PWM mode can generate a Pulse-Width
Modulated signal of varying frequency and duty cycle.
Table 10-1 shows the timer resources required by the
ECCP module.
TABLE 10-1:
R/W-0
ECCP Mode
Compare
Capture
PWM
CCP1M2
R/W-0
ECCP MODE – TIMER
RESOURCES REQUIRED
x = Bit is unknown
CCP1M1
R/W-0
Timer Resource
DS41288F-page 85
Timer1
Timer1
Timer2
CCP1M0
R/W-0
bit 0

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