MC56F8037EVM Freescale Semiconductor, MC56F8037EVM Datasheet - Page 9

• Manufacturer Part Number: MC56F8037EVM
• Description: BOARD EVAL FOR MC56F8037
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of MC56F8037EVM

• Contents: Board, Cables, CD, Debugger
• Silicon Manufacturer: Freescale
• Core Architecture: 56800/E
• Core Sub-architecture: 56800/E
• Silicon Core Number: MC56F
• Silicon Family Name: MC56F80xx
• Kit Contents: MC56F8037EVM, USB-JTAG Adapter, Cables, CD
• Rohs Compliant: Yes
• For Use With/related Products: MC56F8037
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Award-Winning Development Environment
configuration flexibility, and compact program code, the 56F8037/56F8027 is well-suited for many
applications. The 56F8037/56F8027 includes many peripherals that are especially useful for industrial
control, motion control, home appliances, general purpose inverters, smart sensors, fire and security
systems, switched-mode power supply, power management, and medical monitoring applications.
The 56800E core is based on a dual Harvard-style architecture consisting of three execution units
operating in parallel, allowing as many as six operations per instruction cycle. The MCU-style
programming model and optimized instruction set allow straightforward generation of efficient, compact
DSP and control code. The instruction set is also highly efficient for C compilers to enable rapid
development of optimized control applications.
The 56F8037/56F8027 supports program execution from internal memories. Two data operands can be
accessed from the on-chip data RAM per instruction cycle. The 56F8037/56F8027 also offers up to 53
General Purpose Input/Output (GPIO) lines, depending on peripheral configuration.
The 56F8037 Digital Signal Controller includes 64KB of Program Flash and 8KB of Unified
Data/Program RAM. The 56F8027 Digital Signal Controller includes 32KB of Program Flash and 4KB of
Unified Data/Program RAM. Program Flash memory can be independently bulk erased or erased in pages.
Program Flash page erase size is 512 Bytes (256 Words).
A full set of programmable peripherals—PWM, ADCs, QSCIs, QSPIs, I2C, PITs, Quad Timers, DACs
and analog comparators—supports various applications. Each peripheral can be independently shut down
to save power. Any pin in these peripherals can also be used as General Purpose Input/Outputs (GPIOs).
1.3 Award-Winning Development Environment
TM
Processor Expert
(PE) provides a Rapid Application Design (RAD) tool that combines easy-to-use
component-based software application creation with an expert knowledge system.
The CodeWarrior Integrated Development Environment is a sophisticated tool for code navigation,
compiling, and debugging. A complete set of evaluation modules (EVMs), demonstration board kit and
development system cards will support concurrent engineering. Together, PE, CodeWarrior and EVMs
create a complete, scalable tools solution for easy, fast, and efficient development.
1.4 Architecture Block Diagram
The 56F8037/56F8027’s architecture is shown in
Figures
1-1, 1-2, 1-3, 1-4, 1-5, 1-6, and 1-7.
Figure 1-1
illustrates how the 56800E system buses communicate with internal memories and the IPBus Bridge and
the internal connections between each unit of the 56800E core.
Figure 1-2
shows the peripherals and
control blocks connected to the IPBus Bridge.
Figures
1-3, 1-4, 1-5,
1-6
and
1-7
detail how the device’s
I/O pins are muxed. The figures do not show the on-board regulator and power and ground signals. Please
see
Part 2, Signal/Connection
Descriptions, for information about which signals are multiplexed with
those of other peripherals.
1.4.1
PWM, TMR and ADC Connections
Figure 1-6
shows the over-limit and under-limit connections from the ADC to the PWM and the
56F8037/56F8027 Data Sheet, Rev. 7
Freescale Semiconductor
9