C8051F360DK Silicon Laboratories Inc, C8051F360DK Datasheet - Page 118

• Manufacturer Part Number: C8051F360DK
• Description: KIT DEV FOR C8051F360 FAMILY
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F360DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F36x
• Interface Type: USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: C8051F360, F361, F362, F363, F364, F365, F366, F367, F368, F369
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1410

C8051F360/1/2/3/4/5/6/7/8/9
11.2. Integer and Fractional Math
MAC0 is capable of interpreting the 16-bit inputs stored in MAC0A and MAC0B as signed integers or as
signed fractional numbers. When the MAC0FM bit (MAC0CF.1) is cleared to ‘0’, the inputs are treated as
16-bit, 2’s complement, integer values. After the operation, the accumulator will contain a 40-bit, 2’s com-
plement, integer value. Figure 11.2 shows how integers are stored in the SFRs.
When the MAC0FM bit is set to ‘1’, the inputs are treated at 16-bit, 2’s complement, fractional values. The
decimal point is located between bits 15 and 14 of the data word. After the operation, the accumulator will
contain a 40-bit, 2’s complement, fractional value, with the decimal point located between bits 31 and 30.
Figure 11.3 shows how fractional numbers are stored in the SFRs.
118
-(2
-(2
* The MAC0RND register contains the 16 LSBs of a two's complement number. The MAC0N Flag can be
used to determine the sign of the MAC0RND register.
-(2
* -2
-1
15
39
8
)
)
)
2
2
2
2
14
38
1
-1
7
MAC0OVR
MAC0OVR
2
2
2
13
-1
-2
Figure 11.3. Fractional Mode Data Representation
High Byte
High Byte
2
2
2
-2
Figure 11.2. Integer Mode Data Representation
12
-3
2
2
33
High Byte
2
2
2
2
-3
11
-4
2
2
32
MAC0A, and MAC0B Bit Weighting
MAC0A and MAC0B Bit Weighting
1
2
MAC0 Accumulator Bit Weighting
MAC0 Accumulator Bit Weighting
2
-4
2
10
-5
2
MAC0RND Bit Weighting
2
2
31
MAC0ACC3 : MAC0ACC2 : MAC0ACC1 : MAC0ACC0
MAC0ACC3 : MAC0ACC2 : MAC0ACC1 : MAC0ACC0
0
-5
2
2
-6
9
2
2
2
30
-1
-6
2
2
Rev. 1.0
-7
8
2
2
2
-7
29
-2
2
2
-8
7
2
2
2
28
-8
-3
2
2
-9
6
2
-9
2
2
-10
5
2
-10
Low Byte
Low Byte
2
2
2
2
-11
-27
Low Byte
4
4
2
-11
2
2
2
2
-12
-28
2
3
3
-12
2
2
2
2
2
-13
-29
2
2
-13
2
2
2
2
2
-14
-30
-14
1
1
2
2
2
2
2
-15
-31
-15
0
0