C8051F360DK Silicon Laboratories Inc, C8051F360DK Datasheet - Page 152
C8051F360DK
Manufacturer Part Number
C8051F360DK
Description
KIT DEV FOR C8051F360 FAMILY
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F360DK
Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F36x
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F360, F361, F362, F363, F364, F365, F366, F367, F368, F369
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1410
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C8051F360/1/2/3/4/5/6/7/8/9
152
Bit 7:
Bits 6–0: CHMSCTH: Cache Miss Penalty Accumulator (bits 11–5)
Bit 7–1:
Bit 0:
SFR Page:
SFR Address:
SFR Page:
SFR Address:
CHMSOV
Reserved Reserved Reserved Reserved Reserved Reserved Reserved FLBUSY 00000000
Bit7
Bit7
R
R
CHMSOV: Cache Miss Penalty Overflow.
This bit indicates when the Cache Miss Penalty Accumulator has overflowed since it was
last written.
0: The Cache Miss Penalty Accumulator has not overflowed since it was last written.
1: An overflow of the Cache Miss Penalty Accumulator has occurred since it was last written.
These are bits 11-5 of the Cache Miss Penalty Accumulator. The next four bits (bits 4-1) are
stored in CHMSCTL in the CCH0TN register.
The Cache Miss Penalty Accumulator is incremented every clock cycle that the processor is
delayed due to a cache miss. This is primarily used as a diagnostic feature, when optimizing
code for execution speed.
Writing to CHMSCTH clears the lower 5 bits of the Cache Miss Penalty Accumulator.
Reading from CHMSCTH returns the current value of CHMSTCH, and latches bits 4-1 into
CHMSTCL so that they can be read. Because bit 0 of the Cache Miss Penalty Accumulator
is not available, the Cumulative Miss Penalty is equal to 2 * (CCHMSTCH:CCHMSTCL).
RESERVED. Read = 0000000b. Must Write 0000000b.
FLBUSY: Flash Busy
This bit indicates when a Flash write or erase operation is in progress.
0: Flash is idle or reading.
1: Flash write/erase operation is currently in progress.
F
0xD3
F
0xAC
SFR Definition 14.4. CCH0MA: Cache Miss Accumulator
R/W
R/W
Bit6
Bit6
SFR Definition 14.5. FLSTAT: Flash Status
R/W
R/W
Bit5
Bit5
R/W
R/W
Bit4
Bit4
CHMSCTH
Rev. 1.0
R/W
R/W
Bit3
Bit3
R/W
R/W
Bit2
Bit2
R/W
R/W
Bit1
Bit1
R/W
R/W
Bit0
Bit0
00000000
Reset Value
Reset Value
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