C8051F360DK Silicon Laboratories Inc, C8051F360DK Datasheet - Page 264

KIT DEV FOR C8051F360 FAMILY

C8051F360DK

Manufacturer Part Number
C8051F360DK
Description
KIT DEV FOR C8051F360 FAMILY
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F360DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F36x
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F360, F361, F362, F363, F364, F365, F366, F367, F368, F369
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1410
C8051F360/1/2/3/4/5/6/7/8/9
22. Programmable Counter Array
The Programmable Counter Array (PCA0) provides enhanced timer functionality while requiring less CPU
intervention than the standard 8051 counter/timers. PCA0 consists of a dedicated 16-bit counter/timer and
six 16-bit capture/compare modules. Each capture/compare module has its own associated I/O line
(CEXn) which is routed through the Crossbar to Port I/O when enabled (See Section “17.3. General Pur-
pose Port I/O” on page 190). The counter/timer is driven by a programmable timebase that can select
between six inputs as its source: system clock, system clock divided by four, system clock divided by
twelve, the external oscillator clock source divided by 8, Timer 0 overflow, or an external clock signal on the
ECI line. Each capture/compare module may be configured to operate independently in one of six modes:
Edge-Triggered Capture, Software Timer, High-Speed Output, Frequency Output, 8-Bit PWM, or 16-Bit
PWM (each is described in Section 22.2). The PCA is configured and controlled through the system con-
troller's Special Function Registers. The basic PCA block diagram is shown in Figure 22.1.
Important Note: The PCA Module 5 may be used as a watchdog timer (WDT), and is enabled in this mode
following a system reset. Access to certain PCA registers is restricted while WDT mode is enabled.
See Section 22.3 for details.
264
Capture/Compare
Module 0
SYSCLK/12
SYSCLK/4
Timer 0 Overflow
ECI
SYSCLK
External Clock/8
Capture/Compare
Module 1
CLOCK
MUX
PCA
Figure 22.1. PCA Block Diagram
16-Bit Counter/Timer
Capture/Compare
Module 2
Crossbar
Port I/O
Rev. 1.0
Capture/Compare
Module 3
Capture/Compare
Module 4
Capture/Compare
Module 5

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