C8051F360DK Silicon Laboratories Inc, C8051F360DK Datasheet - Page 221

• Manufacturer Part Number: C8051F360DK
• Description: KIT DEV FOR C8051F360 FAMILY
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F360DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F36x
• Interface Type: USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: C8051F360, F361, F362, F363, F364, F365, F366, F367, F368, F369
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1410

19.1. Enhanced Baud Rate Generation
The UART0 baud rate is generated by Timer 1 in 8-bit auto-reload mode. The TX clock is generated by
TL1; the RX clock is generated by a copy of TL1 (shown as RX Timer in Figure 19.2), which is not user-
accessible. Both TX and RX Timer overflows are divided by two to generate the TX and RX baud rates.
The RX Timer runs when Timer 1 is enabled, and uses the same reload value (TH1). However, an
RX Timer reload is forced when a START condition is detected on the RX pin. This allows a receive to
begin any time a START is detected, independent of the TX Timer state.
Timer 1 should be configured for Mode 2, 8-bit auto-reload (see Section “21.1.3. Mode 2: 8-bit
Counter/Timer with Auto-Reload” on page 249). The Timer 1 reload value should be set so that overflows
will occur at two times the desired UART baud rate frequency. Note that Timer 1 may be clocked by one of
six sources: SYSCLK, SYSCLK / 4, SYSCLK / 12, SYSCLK / 48, the external oscillator clock / 8, or an
external input T1. For any given Timer 1 clock source, the UART0 baud rate is determined by
Equation 19.1-A and Equation 19.1-B.
Where T1
value). Timer 1 clock frequency is selected as described in Section “21. Timers” on page 247. A quick ref-
erence for typical baud rates and system clock frequencies is given in Table 19.1 through Table 19.6. Note
that the internal oscillator may still generate the system clock when the external oscillator is driving Timer
1.
CLK
is the frequency of the clock supplied to Timer 1, and T1H is the high byte of Timer 1 (reload
Detected
Start
A)
B)
Figure 19.2. UART0 Baud Rate Logic
UartBaudRate
T1_Overflow_Rate
RX Timer
Equation 19.1. UART0 Baud Rate
Timer 1
TH1
TL1
=
Overflow
Overflow
C8051F360/1/2/3/4/5/6/7/8/9
Rev. 1.0
1
-- -
2
×
=
T1_Overflow_Rate
------------------------- -
256 TH1
T1
–
CLK
2
2
UART
RX Clock
TX Clock
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