EVAL-ADUC832QSZ Analog Devices Inc, EVAL-ADUC832QSZ Datasheet - Page 33

• Manufacturer Part Number: EVAL-ADUC832QSZ
• Description: KIT DEV FOR ADUC832 QUICK START
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ Kitr
• Type: MCUr

Specifications of EVAL-ADUC832QSZ

• Contents: Evaluation Board, Cable, Power Supply, Software and Documentation
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADuC832
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: EVAL-ADUC832QS; EVAL-ADUC832QS

Using the DAC
The on-chip DAC architecture consists of a resistor string DAC
followed by an output buffer amplifier, the functional equivalent
of which is illustrated in Figure 21. Details of the actual DAC
architecture can be found in U.S. Patent Number 5969657
(www.uspto.gov). Features of this architecture include inherent
guaranteed monotonicity and excellent differential linearity.
As illustrated in Figure 21, the reference source for each DAC
is user selectable in software. It can be either AV
0-to-AV
0 V to the voltage at the AV
output transfer function spans from 0 V to the internal V
if an external reference is applied, the voltage at the V
DAC output buffer amplifier features a true rail-to-rail output
stage implementation. This means that, unloaded, each output
is capable of swinging to within less than 100 mV of both AV
and ground. Moreover, the DAC’s linearity specification (when
driving a 10 kΩ resistive load to ground) is guaranteed through
the full transfer function except codes 0 to 100, and, in 0-to-AV
mode only, codes 3995 to 4095. Linearity degradation near
ground and V
and a general representation of its effects (neglecting offset and
gain error) is illustrated in Figure 22. The dotted line in Figure 22
indicates the ideal transfer function, and the solid line represents
what the transfer function might look like with endpoint nonlinear-
ities due to saturation of the output amplifier. Note that Figure 22
represents a transfer function in 0-to-V
V
similar, but the upper portion of the transfer function would
follow the “ideal” line right to the end (V
showing no signs of endpoint linearity errors.
REV. 0
REF
Figure 21. Resistor String DAC Functional Equivalent
mode (with V
DD
AV
V
mode, the DAC output transfer function spans from
REF
DD
DD
is caused by saturation of the output amplifier,
REF
R
R
R
R
R
< V
ADuC832
DD
DD
) the lower nonlinearity would be
pin. In 0-to-V
(FROM MCU)
DISABLE
OUTPUT
BUFFER
HIGH Z
DD
REF
mode only. In 0-to-
in this case, not V
REF
mode, the DAC
DD
DAC0
REF
or V
pin. The
REF.
REF
DD
In
or,
DD
DD
),
–33–
The endpoint nonlinearities conceptually illustrated in Figure 22
get worse as a function of output loading. Most of the ADuC832’s
specifications assume a 10 kΩ resistive load to ground at the
DAC output. As the output is forced to source or sink more
current, the nonlinear regions at the top or bottom (respectively)
of Figure 22 become larger. With larger current demands, this
can significantly limit output voltage swing. Figures 23 and 24
illustrate this behavior. It should be noted that the upper trace in
each of these figures is only valid for an output range selection
of 0-to-AV
highside voltage drops as long as the reference voltage remains
below the upper trace in the corresponding figure. For example,
if AV
affected by loads less than 5 mA. But somewhere around 7 mA,
the upper curve in Figure 24 drops below 2.5 V (V
that at these higher currents the output will not be capable of
reaching V
V
V
DD
Figure 23. Source and Sink Current Capability with
V
DD
Figure 22. Endpoint Nonlinearities Due to Amplifier
Saturation
–100mV
REF
DD
–50mV
100mV
50mV
0mV
V
= V
= 3 V and V
DD
5
4
3
2
1
0
DD
REF
0
DD
000H
. In 0-to-V
.
= 5 V
REF
SOURCE/SINK CURRENT – mA
REF
= 2.5 V, the high side voltage will not be
5
mode, DAC loading will not cause
DAC LOADED WITH 0FFFH
DAC LOADED WITH 0000H
10
ADuC832
REF
), indicating
15
FFFH