EVAL-ADUC832QSZ Analog Devices Inc, EVAL-ADUC832QSZ Datasheet - Page 67

• Manufacturer Part Number: EVAL-ADUC832QSZ
• Description: KIT DEV FOR ADUC832 QUICK START
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ Kitr
• Type: MCUr

Specifications of EVAL-ADUC832QSZ

• Contents: Evaluation Board, Cable, Power Supply, Software and Documentation
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADuC832
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: EVAL-ADUC832QS; EVAL-ADUC832QS

TIMING SPECIFICATIONS
QuickStart Plus Development System
The QuickStart Plus Development system offers users enhanced
nonintrusive debug and emulation tools. The System consists of
the following PC based (Windows compatible) hardware and
software development tools.
Hardware:
Software:
Miscellaneous:
Parameter
CLOCK INPUT (External Clock Driven XTAL1)
NOTES
1
2
3
4
5
6
REV. 0
AC inputs during testing are driven at DV
For timing purposes, a port pin is no longer floating when a 100 mV change from load voltage occurs. A port pin begins to float when a 100 mV change from the
C
ADuC832 internal PLL locks onto a multiple (512 times) the external crystal frequency of 32.768 kHz to provide a Stable 16.78 MHz internal clock for the system.
This number is measured at the default Core_Clk operating frequency of 2.09 MHz.
ADuC832 Machine Cycle Time is nominally defined as 12/Core_CLK.
a Logic 0, as shown in Figure 69.
loaded V
The core can operate at this frequency or at a binary submultiple called Core_Clk, selected via the PLLCON SFR.
LOAD
t
t
t
t
t
1/t
t
t
CK
CKL
CKH
CKR
CKF
CORE
CYC
CORE
for all outputs = 80 pF, unless otherwise noted.
OH
/V
OL
level occurs, as shown in Figure 69.
XTAL1 Period
XTAL1 Width Low
XTAL1 Width High
XTAL1 Rise Time
XTAL1 Fall Time
ADuC832 Core Clock Frequency
ADuC832 Core Clock Period
ADuC832 Machine Cycle Time
DV
DD
– 0.5V
0.45V
ADuC832 Prototype Board
Accutron Nonintrusive Single Pin
Emulator.
ASPIRE Integrated Development
Environment. Features full ‘C’ and
assembly emulation using the
Accutron single pin emulator.
CD-ROM Documentation.
DD
– 0.5 V for a Logic 1 and 0.45 V for a Logic 0. Timing measurements are made at V
1, 2, 3
0.2DV
0.2DV
TEST POINTS
Figure 69. Timing Waveform Characteristics
DD
DD
(AV
all specifications T
– 0.1V
+ 0.9V
t
CHK
5
DD
6
= 2.7 V to 3.6 V or 4.75 V to 5.25 V, DV
4
Figure 68. XTAL1 Input
32.768 kHz External Crystal
Min
0.131
0.72
MIN
–67–
t
V
CKL
LOAD
to T
V
V
MAX
LOAD
LOAD
Typ
30.52
15.16
15.16
20
20
0.476
5.7
, unless otherwise noted.)
t
– 0.1V
+ 0.1V
CKR
t
Figure 67. Accutron Single Pin Emulator
CK
Max
16.78
91.55
REFERENCE
POINTS
TIMING
DD
t
= 2.7 V to 3.6 V or 4.75 V to 5.25 V;
CKF
V
V
LOAD
LOAD
Unit
µs
µs
µs
ns
ns
MHz
µs
µs
IH
– 0.1V
+ 0.1V
min for a Logic 1 and V
V
LOAD
ADuC832
Figure
68
68
68
68
68
IL
max for