MCIMX35WPDKJ Freescale Semiconductor, MCIMX35WPDKJ Datasheet - Page 113

• Manufacturer Part Number: MCIMX35WPDKJ
• Description: BOARD DEV FOR I.MX35
• Manufacturer: Freescale Semiconductor
• Series: i.MX35r
• Type: MPUr

Specifications of MCIMX35WPDKJ

• Contents: Module and Misc Hardware
• Processor To Be Evaluated: i.MX35
• Processor Series: i.MX35
• Data Bus Width: 32 bit
• Interface Type: RS-232, Ethernet, USB, CAN, JTAG
• Core: ARM11
• For Use With/related Products: i.MX35
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.9.22
This section describes electrical characteristics of the SSI.
Freescale Semiconductor
(Output)
STCLK
(Input)
SRCK
SSI Electrical Specifications
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i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 9
All of the timing for the SSI is given for a non-inverted serial clock
polarity (TSCKP/RSCKP = 0) and a non-inverted frame sync
(TFSI/RFSI = 0). If the polarity of the clock and/or the frame sync have
been inverted, all the timing remains valid by inverting the clock signal
STCK/SRCK and/or the frame sync STFS/SRFS shown in the tables
and in the figures.
All timing is on AUDMUX signals when SSI is being used for data
transfer.
“Tx” and “Rx” refer to the transmit and receive sections of the SSI,
respectively.
For internal frame sync operations using the external clock, the FS
timing will be the same as that of Tx Data (for example, during AC97
mode of operation).
Figure 92. STCLK Timing
Figure 91. SRCK Timing
stclkpl
srckpl
V
V
M
M
NOTE
stclkp
srckp
stclkph
srckph
V
V
M
M
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