MCIMX35WPDKJ Freescale Semiconductor, MCIMX35WPDKJ Datasheet - Page 123

BOARD DEV FOR I.MX35

MCIMX35WPDKJ

Manufacturer Part Number
MCIMX35WPDKJ
Description
BOARD DEV FOR I.MX35
Manufacturer
Freescale Semiconductor
Series
i.MX35r
Type
MPUr
Datasheets

Specifications of MCIMX35WPDKJ

Contents
Module and Misc Hardware
Processor To Be Evaluated
i.MX35
Processor Series
i.MX35
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet, USB, CAN, JTAG
Core
ARM11
For Use With/related Products
i.MX35
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1
2
4.9.23.2.14 UART IrDA Mode Receiver
Figure 100
the receive timing characteristics.
1
2
4.9.24
In order to support four different serial interfaces, the USB serial transceiver can be configured to operate
in one of four modes:
Freescale Semiconductor
F
T
exceed 3/(16 × F
F
The UART receiver can tolerate 1/(16 × F
ref_clk
baud_rate
(input)
baud_rate
UA3
UA4
UA5
UA6
RXD
ID
ID
: The period of UART reference clock ref_clk ( ipg_perclk after RFDIV divider).
DAT_SE0 bidirectional, 3-wire mode
DAT_SE0 unidirectional, 6-wire mode
VP_VM bidirectional, 4-wire mode
VP_VM unidirectional, 6-wire mode
: Baud rate frequency. The maximum baud rate the UART can support is ( ipg_perclk frequency)/16.
: Baud rate frequency. The maximum baud rate the UART can support is ( ipg_perclk frequency) ÷ 16.
depicts the UART IrDA mode receive timing, with 8 data bit/1 stop bit format.
Receive bit time
Receive IR pulse duration
USB Electrical Specifications
Start
Bit
baud_rate
Transmit bit time in IrDA mode
UA5
i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 9
Transmit IR pulse duration
Bit 0
).
1
Parameter
Parameter
Figure 100. UART IrDA Mode Receive Timing Diagram
in IrDA mode
Table 81. IrDA Mode Transmit Timing Parameters
Table 82. IrDA Mode Receive Timing Parameters
Bit 1
baud_rate
Bit 2
UA5
) tolerance in each bit. But accumulation tolerance in one frame must not
Bit 3
Symbol
t
Symbol
t
TIRpulse
RIRpulse
t
t
TIRbit
RIRbit
Bit 4
(3/16) × (1/F
1/(16 × F
1/F
1/F
UA6
baud_rate
– T
Bit 5
1.41 us
baud_rate
T
Min.
ref_clk
Min.
ref_clk
baud_rate
baud_rate
2
2
1
Bit 6
)
)
(5/16) × (1/F
(3/16) × (1/F
1/F
1/(16 × F
1/F
Bit 7
baud_rate
baud_rate
+ T
UA5
Max.
Max.
ref_clk
baud_rate
baud_rate
Possible
+ T
baud_rate
Parity
Table 82
Bit
+
ref_clk
UA5
)
)
)
STOP
Units
Units
BIT
lists
123

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