MCIMX35WPDKJ Freescale Semiconductor, MCIMX35WPDKJ Datasheet - Page 93

BOARD DEV FOR I.MX35

MCIMX35WPDKJ

Manufacturer Part Number
MCIMX35WPDKJ
Description
BOARD DEV FOR I.MX35
Manufacturer
Freescale Semiconductor
Series
i.MX35r
Type
MPUr
Datasheets

Specifications of MCIMX35WPDKJ

Contents
Module and Misc Hardware
Processor To Be Evaluated
i.MX35
Processor Series
i.MX35
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet, USB, CAN, JTAG
Core
ARM11
For Use With/related Products
i.MX35
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
9
10
The following parameters are programmed via the DI_DISP#_TIME_CONF_1,
DI_DISP#_TIME_CONF_2, and DI_HSP_CLK_PER registers:
4.9.14
Figure
parameters.
Freescale Semiconductor
Tdrp
Data read point:
Loopback delay Tlbd is the cumulative propagation delay of read controls and read data. It includes an IPU output delay, a
device-level output delay, board delays, a device-level input delay, and an IPU input delay. This value is device specific.
=
T
HSP_CLK
68,
DISP#_IF_CLK_PER_WR
DISP#_IF_CLK_PER_RD
HSP_CLK_PERIOD
DISP#_IF_CLK_DOWN_WR
DISP#_IF_CLK_UP_WR
DISP#_IF_CLK_DOWN_RD
DISP#_IF_CLK_UP_RD
DISP#_READ_EN
MSHC_SCLK
Figure
Memory Stick Host Controller (MSHC)
cei l
------------------------------------------------- -
HSP_CLK_PERIOD
69, and
i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 9
DISP#_READ_EN
tSCLKr
Figure 70
Figure 68. MSHC_CLK Timing Diagram
depict the MSHC timings, and
tSCLKwh
tSCLKc
tSCLKwl
tSCLKf
Table 57
and
Table 58
list the timing
93

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