MCIMX35WPDKJ Freescale Semiconductor, MCIMX35WPDKJ Datasheet - Page 52

BOARD DEV FOR I.MX35

MCIMX35WPDKJ

Manufacturer Part Number
MCIMX35WPDKJ
Description
BOARD DEV FOR I.MX35
Manufacturer
Freescale Semiconductor
Series
i.MX35r
Type
MPUr
Datasheets

Specifications of MCIMX35WPDKJ

Contents
Module and Misc Hardware
Processor To Be Evaluated
i.MX35
Processor Series
i.MX35
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet, USB, CAN, JTAG
Core
ARM11
For Use With/related Products
i.MX35
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
52
DDR17 DQ and DQM setup time to DQS (single-ended strobe)
DDR18 DQ and DQM hold time to DQS (single-ended strobe)
DDR19 Write cycle DQS falling edge to SDCLK output setup time.
DDR20 Write cycle DQS falling edge to SDCLK output hold time.
DDR21 DQS latching rising transitions to associated clock edges
DDR22 DQS high level width
DDR23 DQS low level width
ID
DQM (output)
DQS (output)
DQ (output)
SDCLK_B
These values are for DQ/DM slew rate of 1 V/ns and DQS slew rate of
1 V/ns. For different values use the derating table.
SDCLK
i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 9
Figure 32. DDR2 SDRAM Write Cycle Timing Diagram
PARAMETER
Figure 33. DDR2 SDRAM Write Cycle Parameters
DDR21
DDR17
DDR17
Data
DM
DDR18
DDR18
Data
DM
NOTE
DDR17
DDR17
Data
DM
DDR22
t
t
Symbol
DH1(base)
DS1(base)
Data
DM
t
t
t
t
DQSS
DQSH
t
DQSL
DSS
DSH
DDR23
DDR18
DDR18
Data
DM
0.025
0.025
–0.25
Data
0.35
0.35
Min
DM
0.2
0.2
DDR19
DDR2-400
Freescale Semiconductor
Data
DM
Max
0.25
Data
DM
DDR20
Unit
tCK
tCK
tCK
tCK
tCK
ns
ns

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