M37702E6BFS Renesas Electronics America, M37702E6BFS Datasheet - Page 213

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M37702E6BFS

Manufacturer Part Number
M37702E6BFS
Description
EPROM MCU/8BIT CMOS EMULATION CH
Manufacturer
Renesas Electronics America
Datasheet

Specifications of M37702E6BFS

Accessory Type
Emulator EPROM MCU
For Use With/related Products
7702
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M37702E6BFS
Manufacturer:
MITSUBISHI/三菱
Quantity:
20 000
Fig. 7.4.8 Initial setting example for relevant registers when receiving
UART0 transmit/receive control register 0 (Address 34 )
UART1 transmit/receive control register 0 (Address 3C )
b7
UART0 transmit/receive mode register (Address 30 )
UART1 transmit/receive mode register (Address 38
b7
1
b0
b0
b1b0
BRG count source select bits
0 0 : f
0 1 : f
1 0 : f
1 1 : f
CTS
0 :
1 :
Note: Set the transfer data format in
1 0 0: UART mode (7 bits)
1 0 1: UART mode (8 bits)
1 1 0: UART mode (9 bits)
b2b1b0
Internal/External clock select bit
0: Internal clock
Stop bit length select bit
0: 1 stop bit
1: 2 stop bits
Odd/Even parity select bit
0: Odd parity
1: Even parity
Parity enable bit
0: Parity disabled
1: Parity enabled
Sleep select bit
0: Sleep mode cleared (ignored)
1: Sleep mode selected
1: External clock
CTS
RTS
/
RTS
2
16
64
512
the same way as set on the
transmitter side.
function selected
function selected
select bit
7702/7703 Group User’s Manual
16
16
16
16
)
7.4 Clock asynchronous serial I/O (UART) mode
UART0 receive interrupt control register (Address 72
UART1 receive interrupt control register (Address 74
b7
Port P8 direction register (Address 14
b7
UART0 baud rate register (BRG0) (Address 31
UART1 baud rate register (BRG1) (Address 39
Reception starts when the start
b7
0
UART0 transmit/receive control register 1 (Address 35
UART1 transmit/receive control register 1 (Address 3D
b7
bit is detected.
0
b0
1
b0
Interrupt priority level select bits
When using interrupts, set these bits to
level 1–7.
When disabling interrupts, set these bits
to level 0.
b0
RxD
RxD
b0
Set to 00
0
1
16
pin
pin
SERIAL I/O
Receive enable bit
1: Reception enabled
)
16
to FF .
16
16
16
16
)
)
)
)
16
16
16
)
)
7–47

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