M37702E6BFS Renesas Electronics America, M37702E6BFS Datasheet - Page 215

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M37702E6BFS

Manufacturer Part Number
M37702E6BFS
Description
EPROM MCU/8BIT CMOS EMULATION CH
Manufacturer
Renesas Electronics America
Datasheet

Specifications of M37702E6BFS

Accessory Type
Emulator EPROM MCU
For Use With/related Products
7702
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M37702E6BFS
Manufacturer:
MITSUBISHI/三菱
Quantity:
20 000
Fig. 7.4.10 Connection example
7.4.6 Receive operation
When the receive enable bit is set to “1,” the UARTi enters the reception enabled state and reception starts
at detecting ST. The receive operation is described below.
The receive complete flag is cleared to “0” when the low-order byte of the UARTi receive buffer register
is read out. Figure 7.4.11 shows an example of receive timing when the transfer data length is 8 bits.
synchronously with the transfer clock’s rising.
When one set of data has been prepared, in other words, the shift according to the selected data format
has been completed; the UARTi receive register’s contents are transferred to the UARTi receive buffer
register.
request occurs and its interrupt request bit is set to “1.”
The contents of UARTi receive register are shifted by 1 bit to the right.
Steps
The input signal of the RxD
Simultaneously with step
and
are repeated at each rising of the transfer clock.
Transmitter side
, the receive complete flag is set to “1,” and the UARTi receive interrupt
i
pin is taken into the most significant bit of the UARTi receive register
RxD
TxD
7702/7703 Group User’s Manual
i
i
7.4 Clock asynchronous serial I/O (UART) mode
TxD
RxD
Receiver side
i
i
SERIAL I/O
7–49

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