M37702E6BFS Renesas Electronics America, M37702E6BFS Datasheet - Page 338

• Manufacturer Part Number: M37702E6BFS
• Description: EPROM MCU/8BIT CMOS EMULATION CH
• Manufacturer: Renesas Electronics America

Specifications of M37702E6BFS

• Accessory Type: Emulator EPROM MCU
• For Use With/related Products: 7702
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

APPLICATION
17.1 Memory expansion
Table 17.1.2 Calculation formulas for each parameter (unit: ns)
Table 17.1.3 Data of each parameter (unit: ns)
17–4
Parameter
Parameter
t
t
t
t
t
t
t
t
17.1.2 How to calculate timing
When expanding a memory, use a memory of which standard specifications satisfy the address access
time and the data setup time for write. The following describes how to calculate each timing.
Table 17.1.2 lists the calculation formulas for each parameter; Table 17.1.3 lists the data of each parameter;
Figure 17.1.1 shows the bus timing diagrams.
Figures 17.1.2 and 17.1.4 show the relationship between t
the relationship between t
su(P1D—E)
su(P2D—E)
d(E—P1Q)
d(E–P2Q)
d(P0A—E)
d(P1A—E)
d(P2A—E)
w(EL)
External memory’s address access time; t
External memory’s data setup time for write; t
t
t
t
Address decode time
Address latch delay time
t
t
a(AD)
d(P0A/P1A/P2A–E)
su(P2D/P1D–E)
su(D)
d(E–P2Q/P1Q)
= t
= t
Type
f(X
w(EL)
d(P0A/P1A/P2A-E)
: t
IN
: t
)
d(E–P2Q)
: t
– t
su(P2D–E)
16 MHz version
2
d(P0A–E)
f(X
d(E–P2Q/P1Q)
No Wait
100 +
IN
10
or t
)
45
70
or t
+ t
, t
f(X
9
– 30
d(E–P1Q)
su(D)
d(P1A–E)
1
1
w(EL)
: Time required for the chip select signal to be enabled after decoding address
IN
su(P1D–E)
f(X
)
and f(X
2
IN
– t
: Delay time required when latching address (Unnecessary in minimum model)
10
, or t
8 MHz
)
4
9
su(P2D/P1D–E)
f(X
25 MHz version
– 125
Wait
IN
d(P2A–E)
10
IN
)
).
7702/7703 Group User’s Manual
9
30
45
– 30
– (address decode time
2
a(AD)
8 MHz
f(X
No Wait
30 +
IN
10
su(D)
)
9
1.2
– 30
f(X
f(X
a(A-D)
IN
IN
)
4
10
)
and f(X
f(X
9
16 MHz
Wait
IN
10
– 75
)
1
9
– 30
IN
+ address latch delay time
); Figures 17.1.3 and 17.1.5 show
2
16 MHz
f(X
No Wait
12 +
IN
10
)
9
– 30
1
f(X
f(X
IN
10
IN
)
)
4
9
f(X
– 40
Wait
25 MHz
IN
10
)
2
)
9
– 30