M37702E6BFS Renesas Electronics America, M37702E6BFS Datasheet - Page 79

• Manufacturer Part Number: M37702E6BFS
• Description: EPROM MCU/8BIT CMOS EMULATION CH
• Manufacturer: Renesas Electronics America

Specifications of M37702E6BFS

• Accessory Type: Emulator EPROM MCU
• For Use With/related Products: 7702
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Fig. 4.7.1 Sequence from acceptance of interrupt request to execution of interrupt routine
Fig. 4.7.2 INTACK sequence timing (at minimum)
Interrupt request occurs.
Interrupt
Time from the occurrence of an interrupt request until the completion of executing an instruction
Time from the instruction next to
Time required to execute the INTACK sequence (13 cycles of
which is being executed at the occurrence.
being done at the end of priority detection
Note : At this time, interrupt priority detection starts.
disable
flag (I)
clock
Internal
A
A
A
D
D
Instruction
P
H
L
H
L
When stack pointer (S)’s contents is even and no Wait
CPU
1
Interrupt request is accepted.
4.7 Sequence from acceptance of interrupt request to execution of interrupt routine
PC
PC
PG
H
L
CPU
D
A
A
A
D
Instruction
H
H
P
L
L
@
: CPU standard clock
: High-order 8 bits of CPU internal address bus
: Middle-order 8 bits of CPU internal address bus
: Low-order 8 bits of CPU internal address bus
: CPU internal data bus for odd address
: CPU internal data bus for even address
2
Interrupt response time
00
00
00
FF
XX
16
16
[S]
[S]
00
H
L
INTACK sequence
PG
([S]–1)
([S]–1)
7702/7703 Group User’s Manual
(Note) until the completion of executing an instruction which is
00
H
L
([S]–2)
([S]–2)
INTACK sequence
00
PC
H
L
PC
([S]–3)
([S]–3)
H
L
00
XX
H
L
AD
AD
[S]
([S]–4)
([S]–4)
16
H
L
00
: Not used
: Contents of stack pointer (S)
: Low-order 8 bits of vector address
: Contents of vector address (High-order address)
: Contents of vector address (Low-order address)
PS
PS
H
L
([S]–5)
([S]–5)
H
L
Instructions in interrupt routine
@
@ : Duration for detecting interrupt priority
00
H
L
level
([S]–5)
([S]–5)
00
at minimum)
H
L
FF
XX
00
16
16
INTERRUPTS
AD
AD
H
L
AD
AD
00
H
L
Time
Op-code
Op-code
4–15