M37702E6BFS Renesas Electronics America, M37702E6BFS Datasheet - Page 389

• Manufacturer Part Number: M37702E6BFS
• Description: EPROM MCU/8BIT CMOS EMULATION CH
• Manufacturer: Renesas Electronics America

Specifications of M37702E6BFS

• Accessory Type: Emulator EPROM MCU
• For Use With/related Products: 7702
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Timing requirements (V
Switching characteristics (V
Note: For test conditions, refer to Figure 18.4.1.
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
18.4.8 Memory expansion mode and microprocessor mode : with no Wait
c
w(H)
w(L)
r
f
su(P1D–E)
su(P2D–E)
su(P4D–E)
su(P5D–E)
su(P6D–E)
su(P7D–E)
su(P8D–E)
h(E–P1D)
h(E–P2D)
h(E–P4D)
h(E–P5D)
h(E–P6D)
h(E–P7D)
h(E–P8D)
d(E–P4Q)
d(E–P5Q)
d(E–P6Q)
d(E–P7Q)
d(E–P8Q)
d(E–
w(EL)
d(P0A–E)
d(E–P1Q)
pxz(E–P1Z)
d(P1A–E)
d(P1A–ALE)
h(E–P2Q)
pxz(E–P2Z)
d(P2A–E)
h(P2A–ALE)
d(ALE–E)
w(ALE)
d(BHE–E)
d(R/W–E)
Symbol
Symbol
This is the value depending on f(X
1
)
External clock input cycle time
External clock input high-level pulse width
External clock input low-level pulse width
External clock rise time
External clock fall time
Port P1 input setup time
Port P2 input setup time
Port P4 input setup time
Port P5 input setup time
Port P6 input setup time
Port P7 input setup time
Port P8 input setup time
Port P1 input hold time
Port P2 input hold time
Port P4 input hold time
Port P5 input hold time
Port P6 input hold time
Port P7 input hold time
Port P8 input hold time
Port P4 data output delay time
Port P5 data output delay time
Port P6 data output delay time
Port P7 data output delay time
Port P8 data output delay time
E low-level pulse width
Port P0 address output delay time
Port P1 data output delay time (BYTE = “L”)
Port P1 floating start delay time (BYTE = “L”)
Port P1 address output delay time
Port P1 address output delay time
Port P2 data output delay time
Port P2 floating start delay time
Port P2 address output delay time
Port P2 address output delay time
ALE output delay time
ALE pulse width
BHE output delay time
R/W
_
1
output delay time
output delay time
CC
= 2.7 – 5.5 V, V
CC
= 2.7–5.5 V, V
IN
). For data formula, refer to Table 18.4.1.
7702/7703 Group User’s Manual
SS
Parameter
= 0 V, Ta = –40 to 85 °C, f(X
Parameter
SS
= 0 V, Ta = –40 to 85 °C, f(X
LOW VOLTAGE VERSION
IN
18.4 Electrical characteristics
) = 8 MHz, unless otherwise noted)
IN
) = 8 MHz, unless otherwise noted)
210
125
300
300
300
300
300
Min.
Min.
50
50
40
50
40
60
50
50
50
50
80
80
0
4
0
0
0
0
0
0
0
Limits
Limits
Max.
Max.
300
300
300
300
300
130
130
20
20
40
10
10
18–23
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns