MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 223

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

data. The first word contains the remainder. The data in the first word is right-justified. No CRC logic is
present in hardware, so CRC must be inserted by software.
The writing of RSPBITCOUNT + DRIVECMDMASK + DRIVEDATAMASK to FLASHMEDIACMD2
must take place after SHIFTBUSY2 has gone high.
13.5.6.2
The following two timing diagrams show writing data with and without a busy response from the card.
The write sequence sends out a packet on the DATA line, receives a CRC STATUS response from the card,
and then looks for a potential busy.
Freescale Semiconductor
bitcounter1
bitcounter1
write
FLASHMEDIACMD1 =
0x40000 +
wideShiftMask
write
FLASHMEDIACMD1 =
0x40000 +
wideShiftMask
shift_busy1
DATA lines
interrupt1
Write Data to Card
shift_busy1
DATA lines
Note 1: For 4-bit wide bus, wideShiftMask is 0x400000, CRC length is 64 bits
Note 2: If read data packet followed by another read data packet (block read), set
Note 3: Host interface will stop SCLK_OUT clock when needed to prevent transmit underrun or receive overrun. (not shown)
Note 1: For 4-bit wide bus, wideShiftMask is 0x400000, CRC length is 64 bits
Note 2: If read data packet followed by another read data packet (block read), set
Note 3: Host interface will stop SCLK_OUT clock when needed to prevent transmit underrun or receive overrun. (not shown)
readDataMask = 0x40000. If only one read data packet, set readDataMask = 0.
P P
For 1-bit wide bus, wideShiftMask = 0, CRC length is 16 bits.
For 1-bit wide bus, wideShiftMask = 0, CRC length is 16 bits.
readDataMask = 0x40000. If only one read data packet, set readDataMask = 0.
P
P
P P P
write
FLASHMEDIACMD1 =
0x260000 +
dataBitCount +
wideShiftMask
P P
write
FLASHMEDIACMD1 =
0x260000 +
dataBitCount +
wideShiftMask
Figure 13-25. Writing to Card Without Busy
S
P
Figure 13-24. Writing to Card With Busy
S
Host driving bus
MCF5253 Reference Manual, Rev. 1
Host driving bus
Data
dataBitCount
Data
write one or more
times to
FLASHMEDIADATA1
dataBitCount
write one or more
times to
FLASHMEDIADATA1
CRC
CRC
E
write
FLASHMEDIACMD1 =
0x000003 +
Z Z S crc status E
E
write
FLASHMEDIACMD1 =
0x000003 +
Z
Card driving bus
read
FLASHMEDIA-
DATA1
(get CRC status)
Z
Card driving bus
S crc status
Card signals busy
S
write
FLASHMEDIACMD1=
0
E
L .. L
Check
interrupt1 in
FLASHMEDIASTATUS
read
FLASHMEDIA-
DATA1
(get CRC status)
write
FLASHMEDIACMD1=
0x80000
Z
IDE and Flash Media Interface
Z
E
Host driving
bus
P
Z
Z
Host driving
bus
P
13-25