MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 36

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

MCF5253 Introduction
1.4
The primary features of the MCF5253 integrated processor include the following:
1-4
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ColdFire CF2 Processor Core operating at 140 MHz
— Clock-doubled Version 2 microprocessor core
— 32-bit internal data bus, 16 bit external data bus
— 16 user-visible, 32-bit general-purpose registers
— Supervisor/user modes for system protection
— Vector base register to relocate exception-vector table
— Optimized for high-level language constructs
DMA controller
— Four fully programmable channels: Two dedicated to the audio interface module and two
— Supports dual- and single-address transfers with 32-bit data capability
— Two address pointers that can increment or remain constant
— 16-/24-bit transfer counter
— Operand packing and unpacking support
— Auto-alignment transfers supported for efficient block movement
— Supports bursting and cycle stealing
— All channels support memory to memory transfers
— Interrupt capability
— Provides two clock cycle internal access
Enhanced Multiply-accumulate Unit
— Single-cycle multiply-accumulate operations for 32 x 32 bit and 16 x 16 bit operands
— Support for signed, unsigned, integer, and fixed-point fractional input operands
— Four 48-bit accumulators to allow the use of a 40-bit product
— The addition of 8 extension bits to increase the dynamic number range
— Fast signed and unsigned integer multiplies
8-Kbyte Direct Mapped Instruction Cache
— Clocked at core clock frequency
— Flush capability
— Non-blocking cache provides fast access to critical code and data
128-Kbyte SRAM
— Provides one-cycle access to critical code and data
— Split into two banks, SRAM0 (64K), and SRAM1 (64K)
— DMA requests to/from internal SRAM1 supported
Crystal Trim
MCF5253 Feature Details
dedicated to the UART module. Any of the four channels can be associated to the ATA interface
(External requests are not supported.)
MCF5253 Reference Manual, Rev. 1
Freescale Semiconductor