MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 558

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Universal Serial Bus Interface
Pointer. At the same time, it sets an internal flag indicating that it is now in Recovery Path mode (the
recovery path is annotated in
traversing data structures on the recovery path and executing only those bus transactions as noted above,
on the recovery path until it reaches Restore FSTN (Restore-N). Restore-N.Back Path Link Pointer.T-bit
is set (definition of a Restore indicator), so the host controller exits Recovery Path mode by clearing the
internal Recovery Path mode flag and commences (restores) schedule traversal using the saved value of
the Save-Place FSTN's Normal Path Link Pointer (for example, Save-N.Normal Path Link Pointer). The
nodes traversed during these micro-frames include: {8
4
In frame N+1 (micro-frames 2-7), when the host controller encounters Save-Path FSTN Save-N, it
unconditionally follows Save-N.Normal Path Link Pointer. The nodes traversed during these micro-frames
include: {8
24.9.12.2.3 Software Operational Model for FSTNs
The software must create a consistent, coherent schedule for the host controller to traverse. When using
FSTNs, the system software must adhere to the following rules:
The software should make the schedule as efficient as possible. What this means in this context is that the
software should have no more than one Save-Place FSTN reachable in any single frame. Note there will
be times when two (or more, depending on the implementation) could exist as full/low-speed footprints
change with bandwidth adjustments. This could occur, for example when a bandwidth rebalance causes
the system software to move the Save-Place FSTN from one poll rate level to another. During the
transition, the software must preserve the integrity of the previous schedule until the new schedule is in
place.
24-96
3
, 2
•
•
•
•
1
, Restore-N, 10...}.
Each Save-Place indicator requires a matching Restore indicator.
The Save-Place indicator is an FSTN with a valid Back Path Link Pointer and T-bit equal to zero.
Note that Back Path Link Pointer[Typ] field must be set to indicate the referenced data structure is
a queue head. The Restore indicator is an FSTN with its Back Path Link Pointer[T] bit set.
A Restore FSTN may be matched to one or more Save-Place FSTNs. For example, if the schedule
includes a poll-rate 1 level, then the system software only needs to place a Restore FSTN at the
beginning of this list in order to match all possible Save-Place FSTNs.
If the schedule does not have elements linked at a poll-rate level of one, and one or more
Save-Place FSTNs are used, then the system software must ensure the Restore FSTN's Normal
Path Link Pointer's T-bit is set, as this will be use to mark the end of the periodic list.
When the schedule does have elements linked at a poll rate level of one, a Restore FSTN must be
the first data structure on the poll rate one list. All traversal paths from the frame list converge on
the poll-rate one list. The system software must ensure that Recovery Path mode is exited before
the host controller is allowed to traverse the poll rate level one list.
A Save-Place FSTN's Back Path Link Pointer must reference a queue head data structure. The
referenced queue head must be reachable from the previous frame list location. In other words, if
the Save-Place FSTN is reachable from frame list offset N, then the FSTN's Back Path Link Pointer
must reference a queue head that is reachable from frame list offset N-1.
3.0
, 8
3.1
, 8
3.2
, Save-A, 4
Figure 24-55
3
, 2
MCF5253 Reference Manual, Rev. 1
1
, Restore-N, 1
with a large dashed line). The host controller continues
0
3.0
...}.
, 8
3.1
, 8
3.2
, Save-A, 8
2.2
, 8
2.3
Freescale Semiconductor
, 4
2
, 2
0
, Restore-N,