MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 453

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

The FiFO_DATA Register is used to read or write data to the internal FIFO. It can be accessed as a 16-bit
register or as a 32-bit register. Any long write to the register will put the four bytes written into the FIFO.
Any word write will put the two bytes written into the FIFO. Any long read will read four bytes from the
FIFO. Any word read will read two bytes from the FIFO.
23.5.2.3.3
See
the bit fields.
FIFO_FILL is a read-only register. Any read to it returns the current number of halfwords present in the
FIFO.
23.5.2.4
See
of the bit fields.
Freescale Semiconductor
Address MBAR2 + 0x820 (FIFO_FILL)
Address MBAR2 + 0x818 (FIFO_DATA_32)
Reset
Reset
Reset
Figure 23-38
Figure 23-39
W
W
W
R
R
R
31
15
–
–
0
7
ATA_CONTROL Register
FIFO_FILL Register
30
14
–
–
for illustration of valid bits in the FIFO_FILL Register and
for illustration of valid bits in the ATA Control Register and
29
13
–
–
0
6
28
12
–
–
Figure 23-37. FIFO_Data Register in 32-Bit Mode
27
11
–
–
Figure 23-38. FIFO_FILL Register
MCF5253 Reference Manual, Rev. 1
0
5
26
10
–
–
25
–
–
9
FIFO_DATA[32:16]
FIFO_DATA[15:0]
4
0
FIFO_FILL[7:0]
24
–
–
8
23
–
–
7
0
3
22
Advanced Technology Attachment Controller (ATA)
–
–
6
21
–
–
5
0
2
Table 23-8
20
–
–
4
Table 23-10
19
–
–
3
Access: User read/write
Access: User read-only
0
1
for description of
18
–
2
–
for description
17
–
1
–
0
0
23-27
16
–
–
0