MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 357

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

18.6.2
After completion of the initialization procedure, users can transmit serial data by selecting the “master
transmitter'’ mode. If the MCF5253 is connected to a multimaster bus system, users must test the state of
the I
If the bus is free (IBB=0), the start condition and the first byte (the slave address) can be sent. The data
written to the data register comprises the address of the desired slave and the LSB is set to indicate the
direction of transfer required.
The bus free time (i.e., the time between a STOP condition and the following START condition) is built
into the hardware that generates the START cycle. Depending on the relative frequencies of the system
clock and the SCL period, users may have to wait until the I
the MBDR before proceeding with the following instructions.
An example of a program that generates the START signal and transmits the first byte of data (slave
address) is shown as follows:
CHFLAG MOVE.B
BTST.B #5, (A7)+
BNE.S CHFLAG;If it is set, wait until it is clear
TXSTART MOVE.B MBCR,-(A7);Set transmit mode
BSET.B #4,(A7)
MOVE.B (A7)+, MBCR
MOVE.B MBCR, -(A7);Set master mode
BSET.B #5, (A7);Generate START condition
MOVE.B (A7)+, MBCR;
MOVE.B CALLING,-(A7);Transmit the calling address, D0=R/W
MOVE.B (A7)+, MBDR;
IFREE MOVE.B MBSR,-(A7);Check the IBB bit of the MBSR.
;If it is clear, wait until it is set.
BTST.B #5, (A7)+;
BEQ.S IBFREE;
Freescale Semiconductor
2
C Busy Bit (IBB) to check whether the serial bus is free.
MBCR = $0
MBCR = $A0
dummy read of MBDR
MBSR = $0
MBCR = $0
Generation of START
During the initialization of the I
IBB bit of the MBSR register. If the IBB bit is set when the I
enabled, then the following code sequence should be executed before
proceeding with the normal initialization code. This issues a STOP
command to the slave device, which places it into the idle state as if it were
recently power cycled.
MBSR,-(A7);Check the MBB bit of the MBSR
MCF5253 Reference Manual, Rev. 1
2
C bus module, the user should check the
NOTE
2
C is busy after writing the calling address to
2
C module is
I
2
C Modules
18-13