SI1011-A-GM Silicon Laboratories Inc, SI1011-A-GM Datasheet - Page 136

IC TXRX MCU + EZRADIOPRO

SI1011-A-GM

Manufacturer Part Number
SI1011-A-GM
Description
IC TXRX MCU + EZRADIOPRO
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of SI1011-A-GM

Package / Case
42-QFN
Frequency
240MHz ~ 960MHz
Data Rate - Maximum
256kbps
Modulation Or Protocol
FSK, GFSK, OOK
Applications
General Purpose
Power - Output
20dBm
Sensitivity
-121dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
18.5mA
Current - Transmitting
85mA
Data Interface
PCB, Surface Mount
Memory Size
8kB Flash, 768B RAM
Antenna Connector
PCB, Surface Mount
Number Of Receivers
1
Number Of Transmitters
1
Wireless Frequency
240 MHz to 960 MHz
Interface Type
UART, SMBus, SPI, PCA
Output Power
20 dBm
Operating Supply Voltage
0.9 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Supply Current
4 mA
Minimum Operating Temperature
- 40 C
Modulation
FSK, GFSK, OOK
Protocol Supported
C2, SMBus
Core
8051
Program Memory Type
Flash
Program Memory Size
8 KB
Data Ram Size
768 B
Supply Current (max)
4 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1872-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI1011-A-GM
Manufacturer:
Silicon Laboratories Inc
Quantity:
135
Si1010/1/2/3/4/5
136
Reset
External Interrupt 0 (INT0)
Timer 0 Overflow
External Interrupt 1 (INT1)
Timer 1 Overflow
UART0
Timer 2 Overflow
SPI0
SMB0
SmaRTClock Alarm
ADC0 Window 
Comparator
ADC0 End of 
Conversion
Programmable Counter
Array
Comparator0
Comparator1
Timer 3 Overflow
Supply Monitor Early Warn-
ing
Port Match
SmaRTClock Oscillator Fail
EZRadioPRO Serial Inter-
face (SPI1)
Notes:
1. Indicates a read-only interrupt pending flag. The interrupt enable may be used to prevent software from
2. Indicates a register located in an indirect memory space.
3.
Interrupt Source
vectoring to the associated interrupt service routine.
Blue
text Indicates a bit only available on ‘F912 and ‘F902 devices.
Interrupt
Vector
0x0000
0x0003
0x000B
0x0013
0x001B
0x0023
0x002B
0x0033
0x003B
0x0043
0x004B
0x0053
0x005B
0x0063
0x006B
0x0073
0x007B
0x0083
0x008B
0x0093
Table 12.1. Interrupt Summary
Priority
Order
Top
10
11
12
13
14
15
16
17
18
0
1
2
3
4
5
6
7
8
9
VBATOK (VDM0CN.4)
OSCFAIL (RTC0CN.5)
AD0WINT (ADC0CN.3)
VDDOK (VDM0CN.5)
AD0INT (ADC0STA.5)
RXOVRN (SPI0CN.4)
RXOVRN (SPI1CN.4)
Rev. 1.0
CP0RIF (CPT0CN.5)
CP1RIF (CPT1CN.5)
CP0FIF (CPT0CN.4)
CP1FIF (CPT1CN.4)
ALRM (RTC0CN.2)
TF2H (TMR2CN.7)
CCFn (PCA0CN.n)
TF3H (TMR3CN.7)
WCOL (SPI0CN.6)
MODF (SPI0CN.5)
WCOL (SPI1CN.6)
MODF (SPI1CN.5)
TF2L (TMR2CN.6)
TF3L (TMR3CN.6)
SPIF (SPI0CN.7)
SPIF (SPI1CN.7)
CF (PCA0CN.7)
Pending Flag
RI0 (SCON0.0)
SI (SMB0CN.0)
TI0 (SCON0.1)
TF0 (TCON.5)
TF1 (TCON.7)
IE0 (TCON.1)
IE1 (TCON.3)
None
None
2
1, 3
1
2
N/A N/A
Y
Y
Y
Y
Y
Y
Y
Y
N
Y
Y
Y
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
Y
Y
Y
Y
ESPI0 (IE.6) PSPI0 (IP.6)
EX0 (IE.0)
ET0 (IE.1)
EX1 (IE.2)
ET1 (IE.3)
ES0 (IE.4)
ET2 (IE.5)
EWADC0
EARTC0
ERTC0F
Enable
Enabled
(EIE1.0)
(EIE1.1)
(EIE1.2)
(EIE1.3)
(EIE1.4)
(EIE1.5)
(EIE1.6)
(EIE1.7)
EWARN
(EIE2.0)
(EIE2.1)
(EIE2.2)
(EIE2.3)
ESMB0
EADC0
EPCA0
Always
ESPI1
ECP0
ECP1
EMAT
Flag
ET3
PX0 (IP.0)
PT0 (IP.1)
PX1 (IP.2)
PT1 (IP.3)
PS0 (IP.4)
PT2 (IP.5)
PFRTC0F
PWADC0
Priority
Control
PARTC0
(EIP1.0)
(EIP1.1)
(EIP1.2)
(EIP1.3)
(EIP1.4)
(EIP1.5)
(EIP1.6)
(EIP1.7)
PWARN
(EIP2.0)
(EIP2.1)
(EIP2.2)
(EIP2.3)
Highest
PSMB0
PPCA0
Always
PADC0
PSPI1
PCP0
PCP1
PMAT
PT3

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