SI1011-A-GM Silicon Laboratories Inc, SI1011-A-GM Datasheet - Page 177

IC TXRX MCU + EZRADIOPRO

SI1011-A-GM

Manufacturer Part Number
SI1011-A-GM
Description
IC TXRX MCU + EZRADIOPRO
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of SI1011-A-GM

Package / Case
42-QFN
Frequency
240MHz ~ 960MHz
Data Rate - Maximum
256kbps
Modulation Or Protocol
FSK, GFSK, OOK
Applications
General Purpose
Power - Output
20dBm
Sensitivity
-121dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
18.5mA
Current - Transmitting
85mA
Data Interface
PCB, Surface Mount
Memory Size
8kB Flash, 768B RAM
Antenna Connector
PCB, Surface Mount
Number Of Receivers
1
Number Of Transmitters
1
Wireless Frequency
240 MHz to 960 MHz
Interface Type
UART, SMBus, SPI, PCA
Output Power
20 dBm
Operating Supply Voltage
0.9 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Supply Current
4 mA
Minimum Operating Temperature
- 40 C
Modulation
FSK, GFSK, OOK
Protocol Supported
C2, SMBus
Core
8051
Program Memory Type
Flash
Program Memory Size
8 KB
Data Ram Size
768 B
Supply Current (max)
4 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1872-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI1011-A-GM
Manufacturer:
Silicon Laboratories Inc
Quantity:
135
When the dc-dc converter “Enabled” configuration (one-cell mode) is chosen, the following guidelines
apply:
DC-DC Converter
Enabled
0.9 to 1.8 V 
Supply Voltage
(one-cell mode)
DC-DC Converter
Disabled
1.8 to 3.6 V 
Supply Voltage
(two-cell mode)
In most cases, the GND/VBAT– pin should not be externally connected to GND.
The 0.68 µH inductor should be placed as close as possible to the DCEN pin for maximum efficiency.
The 4.7 µF capacitor should be placed as close as possible to the inductor.
The current loop including GND/VBAT–, the 4.7 µF capacitor, the 0.68 µH inductor and the DCEN pin
should be made as short as possible to minimize capacitance.
The PCB traces connecting VDD_MCU/DC+ to the output capacitor and the output capacitor to
GND_MCU/DC– should be as short and as thick as possible in order to minimize parasitic inductance.
Figure 16.2. DC-DC Converter Configuration Options
VBAT
VBAT
Rev. 1.0
4.7 uF
GND/VBAT-
GND/VBAT-
0.68 uH
DCEN
DCEN
Si1010/1/2/3/4/5
VDD_MCU/
VDD_MCU/
DC+
DC+
GND_MCU/
GND_MCU/
DC-
DC-
1 uF
177

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