WJLXT385LE.B1 Cortina Systems Inc, WJLXT385LE.B1 Datasheet - Page 13

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WJLXT385LE.B1

Manufacturer Part Number
WJLXT385LE.B1
Description
Manufacturer
Cortina Systems Inc
Datasheet

Specifications of WJLXT385LE.B1

Lead Free Status / RoHS Status
Supplier Unconfirmed
Datasheet
Document Number: 249252
Revision Number: 006
Revision Date: 19-Jan-2006
Number
Page
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Old Table 19, “Global Control Register, GCR (0Fh)”, changed to new Table 37, “Global Control
Register, GCR - 0Fh” and table text changed. Old Figure 5, “AMI 50% AMI Encoding”, moved to
new Table 37.
Old Table 23, “AIS Interrupt Status Register, AISIS (15h)”, changed to new Table 41, “AIS
Interrupt Status Register, AISIS - 15h”, and table text changed.
New Chapter 10.0, “Electrical Characteristics”. Old Table 29, “Absolute Maximum Ratings”,
changed to new Table 42, “Absolute Maximum Ratings”, and table text changed.
New Chapter 10.0, “Electrical Characteristics”. Old Table 30, “Recommended Operating
Conditions”, changed to new Table 43, “Recommended Operating Conditions”, and table text
changed.
New Chapter 10.0, “Electrical Characteristics”. New Table 44, “Power Consumption”, added.
Old Table 31, “DC Characteristics”, changed to new Table 45, “DC Characteristics”, and table
text changed.
Old Table 35, “Analog Test Port Characteristics”, removed.
Information from old Chapter 7.0, “Test Specifications”, moved to new Section 11.1, “Intel
LXT385 Transceiver Timing”, and text in tables changed.
Old Table 32, “E1 Transmit Transmission Characteristics”, changed to new Table 46, “AC
Transmitter Characteristics”, and table text changed.
Old Table 33, “E1 Receive Transmission Characteristics”, changed to new Table 47, “AC
Receiver Characteristics”, and table text changed.
Information from old Chapter 7.0, “Test Specifications”, moved to new Chapter 11.0, “Timing
Characteristics”.
Information from old Chapter 7.0, “Test Specification”, moved to new Section 11.2, “Host
Processor Mode - Parallel Interface Timing”.
Information from old Chapter 7.0, “Test Specifications”, moved to new Section 11.2.1, “Intel
Processor - Parallel Interface Timing”, and text in tables changed.
Information from old Chapter 7.0, “Test Specifications”, moved to new Section 11.2.2, “Motorola
Processor - Parallel Interface Timing”, and text in tables changed.
Information from old Chapter 7.0, “Test Specifications”, moved to new Section 11.3, “Host
Processor Mode - Serial Interface Timing”, and text in tables changed.
Information from old Chapter 7.0, “Test Specifications”, moved to new Chapter 12.0, “Line
Interface Unit Circuit Specifications”. New information also added.
Information from old Chapter 7.0, “Test Specifications”, moved to new Chapter 13.0, “Mask
Specifications”. Table text changed.
Information from old Chapter 7.0, “Test Specifications”, moved to new Chapter 14.0, “Jitter
Performance”. Text in tables and figures changed.
Information from old Chapter 7.0, “Test Specifications”, moved to new Chapter 15.0,
“Recommendations and Specifications”, and text changed.
Information from old Chapter 7.0, “Test Specifications”, moved to new Chapter 16.0,
“Mechanical Specifications”.
Old Figure 1, “LXT Block Diagram”, changed to new Figure 1, “Intel® LXT385 Transceiver
High-Level Block Diagram”.
Section 3.1, “Initialization”. Text changed.
Intel
Intel
®
®
LXT385 Transceiver - Revision 003 - (Sheet 5 of 5)
LXT385 Transceiver - Revision 002 (Sheet 1 of 2)
Revision Date: August 22, 2003
August 15, 2003
Description
Contents
®
®
13

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