WJLXT385LE.B1 Cortina Systems Inc, WJLXT385LE.B1 Datasheet - Page 87

no-image

WJLXT385LE.B1

Manufacturer Part Number
WJLXT385LE.B1
Description
Manufacturer
Cortina Systems Inc
Datasheet

Specifications of WJLXT385LE.B1

Lead Free Status / RoHS Status
Supplier Unconfirmed
Document Number: 249252
Revision Number: 006
Revision Date: 19-Jan-2006
Table 37. Digital Loopback Register, DL - 0Ch
Table 38. LOS/AIS Criteria Selection Register, LACS - 0Dh
Table 39. Automatic TAOS Select Register, ATS - 0Eh
Bit
7:0
Bit
7:0
Bit
7:0
LACS7:0
ATS7:0
Name
DL7:0
Name
Name
Digital Loopback.
During digital loopback, LOS and TAOS stay active and independent of TCLK,
while data received on TPOS, TNEG, and CKLK loop back to RPOS, RNEG,
and RCLK.
Loss of Signal / Alarm Indication Signal Selection Criteria.
Automatic Transmit-All-Ones Select.
NOTE: This register does not work during either data-recovery mode or line-
• On power-up, the DL7:0 bits are cleared to ‘0’, and all digital loopback
• Setting a DL bit to ‘1’ enables digital loopback for its corresponding
• At power-up, all LACS7:0 bits are cleared to ‘0’.
• After power-up, programming an LACS bit to:
• On power-on, all ATS7:0 bits are cleared to ‘0’.
• When this field is set to ‘1’, then when there is an LOS condition, TAOS
channels are disabled.
transceiver.
• ‘0’ selects the ITU G.775 mode [for LOS, AIS, and remote detect
• ‘1’ selects the ETSI 300 233 LOS and AIS detection mode for the
can be generated automatically.
indication (RDI)] for its corresponding receiver.
corresponding receiver.
driver mode (that is, when both MCLK = High and TCLK = High).
Intel
®
LXT385 Octal E1 S/H PCM Transceiver with JA
Description
Description
Description
R/W
R/W
R/W
R/W
R/W
R/W
87

Related parts for WJLXT385LE.B1