WJLXT385LE.B1 Cortina Systems Inc, WJLXT385LE.B1 Datasheet - Page 57

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WJLXT385LE.B1

Manufacturer Part Number
WJLXT385LE.B1
Description
Manufacturer
Cortina Systems Inc
Datasheet

Specifications of WJLXT385LE.B1

Lead Free Status / RoHS Status
Supplier Unconfirmed
6.4
6.4.1
Document Number: 249252
Revision Number: 006
Revision Date: 19-Jan-2006
Transmitter
The LXT385 ransceiver has eight identical transmitters.
Transmitter Clocking
The eight low-power transmitters of the LXT385 ransceiver are identical. Transmit data is clocked
serially into the device at TPOS/TNEG in bipolar mode, or at TDATA in unipolar mode. For each
channel, the transmit clock (TCLK) supplies the transmitter input synchronization.
When TNEG/UBS is connected:
The transmitter samples TPOS/TNEG or TDATA inputs on the falling edge of TCLK. Refer to the
Section 5.5, “Clocks and Clock-Related Signals” on page 43
characteristics.
High for more than 16 consecutive MCLK clock cycles, unipolar I/O is used. In this case,
transmit data are clocked serially into the LXT385 ransceiver at TPOS/TDATA, and the
LXT385 ransceiver routes the transmit clock and data signals to its internal encoder.
To an output that supports bipolar mode, the line does not exhibit more than 1 bit
consecutively high for any period of time and the LXT385 ransceiver automatically defaults to
bipolar operation. Transmit data are clocked serially into the LXT385 ransceiver at TPOS/
TNEG.
Intel
®
LXT385 Octal E1 S/H PCM Transceiver with JA
for MCLK and TCLK timing
57

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