WJLXT385LE.B1 Cortina Systems Inc, WJLXT385LE.B1 Datasheet - Page 74

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WJLXT385LE.B1

Manufacturer Part Number
WJLXT385LE.B1
Description
Manufacturer
Cortina Systems Inc
Datasheet

Specifications of WJLXT385LE.B1

Lead Free Status / RoHS Status
Supplier Unconfirmed
7.0
7.1
7.2
74
Intel
®
LXT385 Octal E1 S/H PCM Transceiver with JA
Operating Mode Summary
This section discusses the following operating modes:
Interfacing with 5V Logic
The LXT385 ransceiver can interface directly with 5V TTL family devices. The internal input pads
can tolerate 5V outputs from TTL and CMOS family devices.
Hardware Mode
The Hardware mode is selected when the MODE pin is connected low, which disables the Host
Processor interface. In the Hardware mode, the Host Processor interface pins have different
functions, in that they can be hard-wired to control the LXT385 ransceiver for various operation
modes and to report on the status of operations.
Section 7.1, “Interfacing with 5V Logic”
Section 7.2, “Hardware Mode”
Section 7.3, “Hardware Mode Settings”
Section 7.4, “Host Processor Modes”
Section 7.5, “Interrupt Handling”
Revision Date: 19-Jan-2006
Document Number: 249252
Revision Number: 006

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