WJLXT385LE.B1 Cortina Systems Inc, WJLXT385LE.B1 Datasheet - Page 83

• Manufacturer Part Number: WJLXT385LE.B1
• Manufacturer: Cortina Systems Inc

Specifications of WJLXT385LE.B1

• Lead Free Status / RoHS Status: Supplier Unconfirmed

8.3
Document Number: 249252
Revision Number: 006
Revision Date: 19-Jan-2006
Table 25. ID Register, ID - 00h
Table 26. Analog Loopback Register, ALOOP - 01h
Table 27. Remote Loopback Register, RLOOP - 02h
Table 28. TAOS Enable Register, TAOS - 03h
Register Descriptions
Bit
7:0
Bit
7:0
Bit
7:0
Bit
7:0
TAOS7:0
Name
Name
Name
RL7:0
Name
AL7:0
ID7:0
Identification.
The identification register contains a unique revision code that is factory
programmed for each revision of theLXT385 ransceiver.
Analog Loopback.
Setting one of the AL bits to ‘1’ enables analog loopback for its corresponding
transceiver.
Remote Loopback.
Setting one of the RL bits to ‘1’ enables remote loopback for its corresponding
transceiver.
Transmit All Ones (Enable).
NOTE: TAOS is not available in data-recovery mode or the line-driver mode
• Revision code for the LXT385 transceiver stepping A4 is 00h.
• Revision code for the LXT385 transceiver stepping A5 is 05h.
• Revision code for the LXT385 transceiver stepping B1 is 21h.
• On power-up, the TAOS7:0 bits are cleared to ‘0’.
• Setting one of the TAOS bits to ‘1’ causes a continuous stream of marks
• There are two possible timing references for these bits, depending on the
(that is, ones) to be sent out to the TTIP pin and TRING pin of the
corresponding transmitter.
availability of MCLK. If MCLK:
• Is not available, then the channel TCLK is used as the timing reference
• Is available, MCLK is used as the timing reference for the output.
for the output.
(that is, when both MCLK = High and TCLK = High).
Intel
®
LXT385 Octal E1 S/H PCM Transceiver with JA
Description
Description
Description
Description
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
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