PIC18F65K90T-I/MR Microchip Technology, PIC18F65K90T-I/MR Datasheet - Page 148

• Manufacturer Part Number: PIC18F65K90T-I/MR
• Description: 32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, LCD 64 QFN 9x9x0.9mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F65K90T-I/MR

• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Timers: 8
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Details

PIC18F87K90 FAMILY
REGISTER 10-20: IPR5: PERIPHERAL INTERRUPT PRIORITY REGISTER 5
DS39957D-page 148
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
TMR7GIP
R/W-1
Unimplemented in devices with a program memory of 32 Kbytes (PIC18FX5K90).
(1)
TMR7GIP: TMR7 Gate Interrupt Priority bit
1 = High priority
0 = Low priority
TMR12IP: TMR12 to PR12 Match Interrupt Priority bit
1 = High priority
0 = Low priority
TMR10IP: TMR10 to PR10 Match Interrupt Priority bit
1 = High priority
0 = Low priority
TMR8IP: TMR8 to PR8 Match Interrupt Priority bit
1 = High priority
0 = Low priority
TMR7IP: TMR7 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
TMR6IP: TMR6 to PR6 Match Interrupt Priority bit
1 = High priority
0 = Low priority
TMR5IP: TMR5 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
TMR4IP: TMR4 to PR4 Match Interrupt Priority bit
1 = High priority
0 = Low priority
TMR12IP
R/W-1
(1)
W = Writable bit
‘1’ = Bit is set
TMR10IP
R/W-1
(1)
TMR8IP
R/W-1
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
TMR7IP
(1)
R/W-1
(1)
(1)
(1)
TMR6IP
R/W-1
 2009-2011 Microchip Technology Inc.
x = Bit is unknown
TMR5IP
R/W-1
TMR4IP
R/W-1
bit 0