PIC18F65K90T-I/MR Microchip Technology, PIC18F65K90T-I/MR Datasheet - Page 393

32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, LCD 64 QFN 9x9x0.9mm T/R

PIC18F65K90T-I/MR

Manufacturer Part Number
PIC18F65K90T-I/MR
Description
32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, LCD 64 QFN 9x9x0.9mm T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F65K90T-I/MR

Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
2 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
64 MHz
Number Of Timers
8
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
53
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN Exposed Pad
Lead Free Status / Rohs Status
 Details
24.5
Each comparator has up to eight possible combina-
tions of inputs: up to four external analog inputs and
one of two internal voltage references.
All of the comparators allow a selection of the signal from
pin, CxINA, or the voltage from the Comparator Voltage
Reference (CV
compared to either CxINB, CxINC, C2INB/C2IND or the
microcontroller’s fixed internal reference voltage (V
1.024V nominal) on the inverting channel. The
comparator inputs and outputs are tied to fixed I/O pins,
defined in
urations and their corresponding bit settings are shown
in
TABLE 24-1:
24.5.1
Setting the CON bit of the CMxCON register
(CMxCON<7>) enables the comparator for operation.
Clearing the CON bit disables the comparator, resulting
in minimum current consumption.
The CCH<1:0> bits in the CMxCON register
(CMxCON<1:0>) direct either one of three analog input
pins, or the Internal Reference Voltage (VBG), to the
comparator, V
 2009-2011 Microchip Technology Inc.
Note 1:
Comparator
Figure
1
2
3
Comparator Control and
Configuration
24-4.
Table
C1INC, C2INC and C2IND are all
unavailable for 64-pin devices
(PIC18F6XK90).
COMPARATOR ENABLE AND
INPUT SELECTION
REF
IN
24-1. The available comparator config-
-. Depending on the comparator
) on the non-inverting channel. This is
COMPARATOR INPUTS AND
OUTPUTS
Input or Output
C1INC
C2IND
C2INC
C1INA (V
C2INA (V
C3INA (V
C1INB (V
C2INB (V
C2INB (V
C3INB (V
C3INC (V
C2INB (V
C1OUT
C2OUT
C3OUT
(1)
(1)
(1)
(V
(V
(V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
+)
+)
+)
-)
-)
-)
-)
-)
-)
-)
-)
-)
I/O Pin
RH6
RH4
RH5
RG2
RG3
RG4
RG1
RF6
RF5
RF3
RF2
RF4
RF3
RF1
RF3
BG
,
PIC18F87K90 FAMILY
operating mode, either an external or internal voltage
reference may be used. For external analog pins that
are unavailable in 64-pin devices (C1INC, C2INC and
C2IND), the corresponding configurations that use
them as inputs are unavailable.
The analog signal present at V
signal at V
is adjusted accordingly.
The external reference is used when CREF = 0
(CMxCON<2>) and V
pin. When external voltage references are used, the
comparator module can be configured to have the
reference sources externally. The reference signal
must be between V
either pin of the comparator.
The comparator module also allows the selection of an
internally generated voltage reference from the Compar-
ator Voltage Reference (CV
described in more detail in Section 25.0 “Comparator
Voltage Reference Module” . The reference from the
comparator voltage reference module is only available
when CREF = 1 . In this mode, the internal voltage
reference is applied to the comparator’s V
24.5.2
The comparator outputs are read through the CMSTAT
register. The CMSTAT<5> bit reads the Comparator 1
output, CMSTAT<6> reads Comparator 2 output and
CMSTAT<7> reads Comparator 3 output. These bits
are read-only.
The comparator outputs may also be directly output to
the RF2, RF1 and RG1 I/O pins by setting the COE bit
(CMxCON<6>). When enabled, multiplexers in the
output path of the pins switch to the output of the
comparator. While in this mode, the TRISF<2:1> and
TRISG<1> bits still function as the digital output enable
bits for the RF2, RF1 and RG1 pins.
By default, the comparator’s output is at logic high
whenever the voltage on V
The polarity of the comparator outputs can be inverted
using the CPOL bit (CMxCON<5>).
The uncertainty of each of the comparators is related to
the input offset voltage and the response time given in
the specifications, as discussed in
“Comparator Operation”
Note:
IN
The comparator input pin, selected by
CCH<1:0>, must be configured as an input
by setting both the corresponding TRISF,
TRISG or TRISH bit and the corresponding
ANSELx bit in the ANCONx register.
COMPARATOR ENABLE AND
OUTPUT SELECTION
+ and the digital output of the comparator
SS
IN
and V
+ is connected to the CxINA
.
REF
IN
DD
+ is greater than on V
) module. This module is
, and can be applied to
IN
- is compared to the
DS39957D-page 393
IN
Section 24.2
+ pin.
IN
-.

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