PIC18F65K90T-I/MR Microchip Technology, PIC18F65K90T-I/MR Datasheet - Page 282

• Manufacturer Part Number: PIC18F65K90T-I/MR
• Description: 32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, LCD 64 QFN 9x9x0.9mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F65K90T-I/MR

• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Timers: 8
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Details

PIC18F87K90 FAMILY
20.3.2
This mode does not use external resistors, but rather
internal resistor ladders that are configured to generate
the bias voltage.
The internal reference ladder actually consists of three
separate ladders. Disabling the internal reference
ladder disconnects all of the ladders, allowing external
voltages to be supplied.
Depending on the total resistance of the resistor
ladders, the biasing can be classified as low, medium
or high power.
FIGURE 20-4:
DS39957D-page 282
INTERNAL RESISTOR BIASING
LCDBIAS3
LCDBIAS2
LCDBIAS1
A Power Mode
B Power Mode
LRLAT<2:0>
3x Band Gap
LCDCST<2:0>
LCD BIAS INTERNAL RESISTOR LADDER CONNECTION DIAGRAM
V
DDCORE
LCDIRS
LRLAP<1:0>
VLCD3PE
VLCD2PE
VLCD1PE
V
V
DD
DD
Resistor
Ladder
Low
LRLBP<1:0>
LCDIRE
Resistor
Medium
Ladder
Table 20-3
ladders.
connections. When the internal resistor ladder is
selected, the bias voltage can either be from V
from V
TABLE 20-3:
Power Mode
Low
Medium
High
DDCORE
Figure 20-4
shows the total resistance of each of the
, depending on the LCDIRS setting.
Resistance of
Entire Ladder
INTERNAL RESISTANCE
LADDER POWER MODES
Resistor
 2009-2011 Microchip Technology Inc.
Ladder
High
Nominal
shows the internal resister ladder
300 k
30 k
3 M
100 A
10 A
I
DD
1 A
DD
or