PIC18F65K90T-I/MR Microchip Technology, PIC18F65K90T-I/MR Datasheet - Page 389

32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, LCD 64 QFN 9x9x0.9mm T/R

PIC18F65K90T-I/MR

Manufacturer Part Number
PIC18F65K90T-I/MR
Description
32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, LCD 64 QFN 9x9x0.9mm T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F65K90T-I/MR

Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
2 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
64 MHz
Number Of Timers
8
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
53
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN Exposed Pad
Lead Free Status / Rohs Status
 Details
24.0
The analog comparator module contains three compar-
ators that can be independently configured in a variety
of ways. The inputs can be selected from the analog
inputs and two internal voltage references. The digital
outputs are available at the pin level and can also be
read through the control register. Multiple output and
interrupt event generation are also available. A generic
single comparator from the module is shown in
Figure
Key features of the module includes:
• Independent comparator control
• Programmable input configuration
• Output to both pin and register levels
• Programmable output polarity
• Independent interrupt generation for each
FIGURE 24-1:
 2009-2011 Microchip Technology Inc.
comparator with configurable interrupt-on-change
C2INB/C2IND
Note 1:
24-1.
CCH<1:0>
2:
COMPARATOR MODULE
CxINC
CV
CxINA
CxINB
CREF
Comparators, 1 and 3, use C2INB as an input to the inverting terminal. Comparator 2 uses C2IND as an input to
the inverted terminal.
C1INC, C2INC and C2IND are all unavailable on 64-pin devices (PIC18F6XK90).
V
REF
(1,2)
BG
(2)
COMPARATOR SIMPLIFIED BLOCK DIAGRAM
0
1
0
1
2
3
V
V
IN
IN
+
-
CON
Cx
PIC18F87K90 FAMILY
24.1
The CMxCON registers (CM1CON, CM2CON and
CM3CON) select the input and output configuration for
each comparator, as well as the settings for interrupt
generation (see
The CMSTAT register
put results of the comparators. The bits in this register
are read-only.
EVPOL<1:0>
Registers
Interrupt
Polarity
CPOL
Logic
Logic
Register
(Register
COE
24-1).
24-2) provides the out-
DS39957D-page 389
CMPxOUT
(CMSTAT<7:5>)
CMPxIF
CxOUT

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