PIC18F65K90T-I/MR Microchip Technology, PIC18F65K90T-I/MR Datasheet - Page 49

• Manufacturer Part Number: PIC18F65K90T-I/MR
• Description: 32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, LCD 64 QFN 9x9x0.9mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F65K90T-I/MR

• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Timers: 8
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Details

FIGURE 3-7:
3.5.2.2
The PLL is available to the internal oscillator block
when the internal oscillator block is configured as the
primary clock source. In this configuration, the PLL is
enabled in software and generates a clock output of up
to 64 MHz.
The operation of INTOSC with the PLL is described in
Section 3.6.2 “INTPLL
that the PLL is enabled only if the HF-INTOSC
postscaler is configured for 8 MHz or 16 MHz
3.6
The PIC18F87K90 family of devices includes an
internal oscillator block which generates two different
clock signals. Either clock can be used as the micro-
controller’s clock source, which may eliminate the need
for an external oscillator circuit on the OSC1 and/or
OSC2 pins.
The internal oscillator consists of three blocks, depend-
ing on the frequency of operation. They are
HF-INTOSC, MF-INTOSC and LF-INTRC.
In HF-INTOSC mode, the internal oscillator can provide
a frequency, ranging from 31 kHz to 16 MHz, with the
postscaler
(IRCF<2:0>).
The INTSRC bit (OSCTUNE<7>) and MFIOSEL bit
(OSCCON2<0>) also decide which INTOSC provides
the lower frequency (500 kHz to 31 kHz). For the
HF-INTOSC to provide these frequencies, INTSRC = 1
and MFI0SEL = 0.
In HF-INTOSC, the postscaler (IRCF<2:0>) provides the
frequency range of 31 kHz to 16 MHz. If HF-INTOSC is
used with the PLL, the input frequency to the PLL should
be 8 MHz or 16 MHz (IRCF<2:0> = 111, 110).
 2009-2011 Microchip Technology Inc.
OSC2
OSC1
Internal Oscillator Block
HS or EC
PLLCFG (CONFIG1H<4>)
Mode
PLL Enable (OSCTUNE)
PLL and HF-INTOSC
deciding
F
F
IN
OUT
PLL BLOCK DIAGRAM
4
Modes”. Care should be taken
the
Comparator
Loop
Filter
Phase
selected
VCO
frequency
.
SYSCLK
PIC18F87K90 FAMILY
For MF-INTOSC mode to provide a frequency range of
500 kHz to 31 kHz, INTSRC = 1 and MFIOSEL = 1.
The postscaler (IRCF<2:0>), in this mode, provides the
frequency range of 31 kHz to 500 kHz.
The LF-INTRC can provide only 31 kHz if INTSRC = 0.
The LF-INTRC provides 31 kHz and is enabled if it is
selected as the device clock source. The mode is
enabled automatically when any of the following is
enabled:
• Power-up Timer
• Fail-Safe Clock Monitor
• Watchdog Timer
• Two-Speed Start-up
These features are discussed in greater detail in
Section 28.0 “Special Features of the
The clock source frequency (HF-INTOSC, MF-INTOSC
or LF-INTRC direct) is selected by configuring the IRCF
bits of the OSCCON register, as well the INTSRC and
MFIOSEL bits. The default frequency on device Resets
is 8 MHz.
3.6.1
Using the internal oscillator as the clock source elimi-
nates the need for up to two external oscillator pins,
which can then be used for digital I/O. Two distinct
oscillator configurations, which are determined by the
OSC Configuration bits, are available:
• In INTIO1 mode, the OSC2 pin (RA6) outputs
• In INTIO2 mode, OSC1 functions as RA7 and
FIGURE 3-8:
FIGURE 3-9:
F
Figure
OSC2 functions as RA6 (see
are available as digital input and output ports.
OSC
F
RA7
RA6
OSC
RA7
/4, while OSC1 functions as RA7 (see
3-8) for digital input and output.
/4
INTIO MODES
INTIO1 OSCILLATOR MODE
INTIO2 OSCILLATOR MODE
I/O (OSC1)
I/O (OSC2)
I/O (OSC1)
OSC2
PIC18F87K90
PIC18F87K90
Figure
DS39957D-page 49
3-9). Both
CPU”.