PIC18F65K90-I/MR Microchip Technology, PIC18F65K90-I/MR Datasheet - Page 171

• Manufacturer Part Number: PIC18F65K90-I/MR
• Description: 32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, LCD 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F65K90-I/MR

• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Timers: 8
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Details

TABLE 11-10: PORTE FUNCTIONS (CONTINUED)
TABLE 11-11: SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
 2009-2011 Microchip Technology Inc.
PORTE
LATE
TRISE
LCDCON
LCDSE3
ODCON1
ODCON2 CCP10OD
PADCFG1
Legend: Shaded cells are not used by PORTE.
Note 1:
RE7/ECCP2/
P2A/SEG31
Legend:
Note 1:
Name
Pin Name
2:
2:
This bit is not available in 64-pin devices.
Unimplemented in devices with a program memory of 32 Kbytes (PIC18FX5K90).
O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Trigger Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Alternate assignment for ECCP2 when the CCP2MX Configuration bit is cleared.
This bit is unimplemented in PIC18FX5K90 devices.
SSP1OD
TRISE7
LCDEN
LATE7
RDPU
SE31
Bit 7
RE7
Function
ECCP2
SEG31
RE7
P2A
(2)
(1)
CCP9OD
CCP2OD CCP1OD
TRISE6
SLPEN
LATE6
REPU
SE30
Bit 6
RE6
Setting
TRIS
0
1
0
1
0
1
(2)
CCP8OD CCP7OD CCP6OD
TRISE5
RJPU
WERR
LATE5
SE29
Bit 5
I/O
RE5
O
O
O
O
I
I
(1)
Type
ANA
DIG
DIG
I/O
ST
ST
—
TRISE4 TRISE3
LATE4
SE28
Bit 4
RE4
—
—
—
LATE<7> data output.
PORTE<7> data input.
ECCP2 compare/PWM output; takes priority over port data.
ECCP2 capture input.
ECCP2 PWM Output A. May be configured for tri-state during
Enhanced PWM shutdown event.
Segment 31 analog output for LCD; disables digital output.
LATE3
PIC18F87K90 FAMILY
SE27
Bit 3
RE3
CS1
—
—
RTSECSEL1 RTSECSEL0
CCP5OD
TRISE2
LATE2
SE26
Bit 2
RE2
CS0
—
Description
CCP4OD
TRISE1
LMUX1
LATE1
SE25
Bit 1
RE1
—
CCP3OD
SSP2OD
TRISE0
LMUX0
LATE0
DS39957D-page 171
SE24
Bit 0
RE0
—
on Page:
Values
Reset
78
78
78
83
83
81
81
80