ST92196A STMicroelectronics, ST92196A Datasheet - Page 146
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ST92196A
Manufacturer Part Number
ST92196A
Description
8/16-bit Mcu For Tv Applications With Up To 96k Rom, On-screen-display And 1 Or 2 Data Slicers
Manufacturer
STMicroelectronics
Datasheet
1.ST92196A.pdf
(268 pages)
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OSD CONTROLLER (Cont’d)
Foreground Serial Attribute
Address in Segment 22h: 2p + 5 + z. See
59
Bit 5 = FLA Flash control bit
This bit controls the flashing feature (see Section
0.2.4.2).
0: All the following characters in the row are not af-
1: All the following characters in the row follow the
Note: Flashing characters are alternatively dis-
played as spaces and in normal mode (non-flash-
ing), depending on the value of the FON bit in the
Row Attribute byte (see
The flash rate is controlled by software by toggling
the "FON" bit.
Bit 4 = IT Italics control bit
This bit enables the italic feature for the row. (See
Section
0: Italics are disabled.
1: All the following characters, until the end of the
Note: Italics mode is only available in serial mode.
Bits 3:0 = FP[3:0] Foreground Palette pointer
The FP[3:0] value points to one of the 16 prede-
fined entries of the foreground palette for fore-
ground color, translucency and underline style of
all the following characters (see
For example, FP[3:0] = 0 points to the first fore-
ground palette entry, 10h & 11h if the palette swap
bit PASW of the OSDDR register is reset.
8.5.8.6 Basic Parallel Mode
In basic parallel mode, each character code (1
byte) is followed by a palette attribute (1 byte). See
Figure
Let’s assume that the start address of the current
row buffer is 2p (even address).
In this case the character codes are stored in OS-
DRAM at the address 2p+4+2z, and the palette at-
tributes are stored in the OSDRAM at the address
2p+5+2z, where z ranges from 1 to RCN (RCN is
7
fected by the flashing mechanism.
flashing mechanism.
row, or the next foreground serial attribute are
displayed in italics.
1
59.
8.5.3.6)
0
FLA
IT
Section
FP3
Section
8.5.8.3).
FP2
FP1
8.5.6.3).
Figure
FP0
0
- ON SCREEN DISPLAY CONTROLLER (OSD)
the row character count defined in
8.5.8.2).
The character code structure allows pointing to the
first 256 characters of the font ROM (the character
code value = the character number in font ROM).
CHARACTER CODE IN BASIC PARALLEL
MODE
Address in Segment 22h: 2p+4+2z. See
59.
Bits 7:0 = CHC[7:0] Character Code in basic par-
allel mode
The CHC[7:0] value points to one of the first 256
characters stored in the font ROM.
PALETTE ATTRIBUTE
Address in segment 22h: 2p+5+2z. See
Bits 7:4 = FP[3:0] Foreground Palette pointer
The FP[3:0] value points to one of the 16 prede-
fined entries of the foreground palette for the fore-
ground color, the translucency and the underline
style of all the following characters (see
8.5.6.3
For example, FP[3:0] = 0 points to the first fore-
ground palette entry, 10h & 11h if the palette swap
bit PASW of the OSDDR register is reset (see reg-
isters description for more details).
Bits 3:0 = BP[3:0] Background Palette pointer
The BP[3:0] value points to one of the 16 prede-
fined entries of the background palette for the
background color and the translucency.
For example, BP[3:0] = 0 points to the first back-
ground palette entry, 30h & 31h if the palette swap
bit PASW of the OSDDR register is reset (see reg-
isters description for more details).
Note: the background color of the character is af-
fected by the use of the “M” bit located in the Back-
ground Palette (see
CHC7 CHC6
FP3
7
7
FP2
for further details).
CHC5
FP1
CHC4 CHC3 CHC2 CHC1 CHC0
Section
FP0
BP3
8.5.6.4).
BP2
BP1
Figure
Section
Section
146/268
Figure
BP0
0
0
59.
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